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From:   Syed Saba Kareem <Syed.SabaKareem@amd.com>
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Subject: [PATCH 3/3] ASoC: amd: acp: fix for i2s mode register field update
Date:   Tue, 31 Oct 2023 19:29:34 +0530
Message-ID: <20231031135949.1064581-3-Syed.SabaKareem@amd.com>
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I2S mode register field will be set to 1 when tdm mode is enabled.
Update the I2S mode field based on tdm_mode flag check.

This will fix below smatch checker warning.

sound/soc/amd/acp/acp-i2s.c:59 acp_set_i2s_clk()
	warn: odd binop '0x0 & 0x2'

Fixes: 40f74d5f09d7 ("ASoC: amd: acp: refactor acp i2s clock
	generation code")

Reported-By: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Syed Saba Kareem <Syed.SabaKareem@amd.com>
---
 sound/soc/amd/acp/acp-i2s.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/amd/acp/acp-i2s.c b/sound/soc/amd/acp/acp-i2s.c
index 1185e5aac523..60cbc881be6e 100644
--- a/sound/soc/amd/acp/acp-i2s.c
+++ b/sound/soc/amd/acp/acp-i2s.c
@@ -26,7 +26,6 @@
 
 #define DRV_NAME "acp_i2s_playcap"
 #define	I2S_MASTER_MODE_ENABLE		1
-#define	I2S_MODE_ENABLE			0
 #define	LRCLK_DIV_FIELD			GENMASK(10, 2)
 #define	BCLK_DIV_FIELD			GENMASK(23, 11)
 #define	ACP63_LRCLK_DIV_FIELD		GENMASK(12, 2)
@@ -56,7 +55,8 @@ static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id)
 	}
 
 	val  = I2S_MASTER_MODE_ENABLE;
-	val |= I2S_MODE_ENABLE & BIT(1);
+	if (adata->tdm_mode)
+		val |= BIT(1);
 
 	switch (chip->acp_rev) {
 	case ACP63_DEV:
-- 
2.25.1