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[178.235.177.91]) by smtp.gmail.com with ESMTPSA id v17-20020ac25591000000b00503189d8b8csm233610lfg.198.2023.10.31.08.23.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Oct 2023 08:23:22 -0700 (PDT) Message-ID: <873c1b14-5b7c-4fb1-8f09-6344a4bf901b@linaro.org> Date: Tue, 31 Oct 2023 16:23:19 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 2/5] arm64: dts: qcom: ipq9574: Add ecc engine support Content-Language: en-US To: Md Sadre Alam , agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, broonie@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, quic_srichara@quicinc.com, qpic_varada@quicinc.com References: <20231031120307.1600689-1-quic_mdalam@quicinc.com> <20231031120307.1600689-3-quic_mdalam@quicinc.com> From: Konrad Dybcio Autocrypt: addr=konrad.dybcio@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Tue, 31 Oct 2023 08:23:34 -0700 (PDT) On 31.10.2023 13:03, Md Sadre Alam wrote: > Signed-off-by: Md Sadre Alam > Signed-off-by: Sricharan R > --- Hello, you're missing: - dt-bindings (make dtbs_check is unhappy) - a commit message - Co-developed-by for Sricharan status should read "okay" instead, but in this case it's unnecessary as you're defining the node and lack of the status property also means that device is enabled however this ECC engine seems to be a part of the NAND controller, so it's unlikely that the DT maintainers will agree for it to have a separate node Konrad > arch/arm64/boot/dts/qcom/ipq9574.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > index 5f83ee42a719..b44acb1fac74 100644 > --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > @@ -336,6 +336,11 @@ sdhc_1: mmc@7804000 { > status = "disabled"; > }; > > + bch: qpic_ecc { > + compatible = "qcom,ipq9574-ecc"; > + status = "ok"; > + } > + > blsp_dma: dma-controller@7884000 { > compatible = "qcom,bam-v1.7.0"; > reg = <0x07884000 0x2b000>;