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[2001:1c00:c32:7800:5bfa:a036:83f0:f9ec]) by smtp.gmail.com with ESMTPSA id t17-20020a17090616d100b0099cb349d570sm2264480ejd.185.2023.11.01.04.01.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Nov 2023 04:01:31 -0700 (PDT) Content-Type: multipart/mixed; boundary="------------ut2CYh1xth06y9kfNtp1tqdw" Message-ID: <437a20fe-121e-0d8c-04a0-da30db71d2ea@redhat.com> Date: Wed, 1 Nov 2023 12:01:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v2 6/7] drm/i915/dsi: Replace poking of CHV GPIOs behind the driver's back Content-Language: en-US, nl From: Hans de Goede To: Andy Shevchenko Cc: Jani Nikula , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter References: <20231024155739.3861342-1-andriy.shevchenko@linux.intel.com> <20231024155739.3861342-7-andriy.shevchenko@linux.intel.com> <16e533e2-81bb-47ba-9e23-460a626bcad7@redhat.com> In-Reply-To: X-Spam-Status: No, score=-5.0 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 01 Nov 2023 04:02:48 -0700 (PDT) This is a multi-part message in MIME format. --------------ut2CYh1xth06y9kfNtp1tqdw Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, On 11/1/23 11:20, Hans de Goede wrote: > Hi, > > On 11/1/23 10:32, Andy Shevchenko wrote: >> On Tue, Oct 31, 2023 at 10:15:52PM +0100, Hans de Goede wrote: >>> On 10/31/23 17:07, Hans de Goede wrote: >>>> On 10/24/23 18:11, Andy Shevchenko wrote: >>>>> On Tue, Oct 24, 2023 at 06:57:38PM +0300, Andy Shevchenko wrote: >> >> ... >> >>>> As for the CHT support, I have not added that to my tree yet, I would >>>> prefer to directly test the correct/fixed patch. >>> >>> And I hit the "jackpot" on the first device I tried and the code needed >>> some fixing to actually work, so here is something to fold into v3 to >>> fix things: >> >> Thanks! >> >> But let me first send current v3 as it quite differs to v2 in the sense >> of how I do instantiate GPIO lookup tables. > > The problem is there already is a GPIO lookup table registered for > the "0000:00:02.0" device by intel_dsi_vbt_gpio_init() and there can > be only be one GPIO lookup table per device. So no matter how you > instantiate GPIO lookup tables it will not work. > > The solution that I chose is to not instantiate a GPIO lookup table > at all and instead to extend the existing table with an extra entry. > > Although thinking more about it I must admit that this is racy. > > So a better idea would be to unregister the GPIO lookup > table registered by intel_dsi_vbt_gpio_init() after getting > the GPIOs there, that would allow instantiating a new one > from soc_exec_opaque_gpio() as it currently does and that > would be race free. > >> Meanwhile I will look into the change you sent (and hopefully we can >> incorporate something in v3 for v4). > > Ok, lets go with your v3. > > I'll prepare a patch to move the unregistering of the existing > conflicting GPIO lookup from intel_dsi_vbt_gpio_cleanup() > to the end of intel_dsi_vbt_gpio_init() to avoid the conflict > we have there. Attached is this patch, this should probably be one of the first patches in the v3 submission. Note that if you go with Ville's suggestion to preparse the MIPI sequences, things will change significantly and then the attached patch will likely be unnecessary. Regards, Hans > Note you still need the first part of my patch which is > an unrelated bugfix: > > --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c > +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c > @@ -219,8 +219,7 @@ static void soc_exec_gpio(struct intel_connector *connector, const char *con_id, > } else { > gpio_desc = devm_gpiod_get_index(dev_priv->drm.dev, > con_id, gpio_index, > - value ? GPIOD_OUT_LOW : > - GPIOD_OUT_HIGH); > + value ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); > if (IS_ERR(gpio_desc)) { > drm_err(&dev_priv->drm, > "GPIO index %u request failed (%pe)\n", > > Regards, > > Hans > > --------------ut2CYh1xth06y9kfNtp1tqdw Content-Type: text/x-patch; charset=UTF-8; name="0001-drm-i915-dsi-Remove-GPIO-lookup-table-at-the-end-of-.patch" Content-Disposition: attachment; filename*0="0001-drm-i915-dsi-Remove-GPIO-lookup-table-at-the-end-of-.pa"; filename*1="tch" Content-Transfer-Encoding: base64 RnJvbSBjYjNjYzY1NmFkODlkOTg4MjRkMzhjMDdhMzUwMTljNTEyMjI3NjAxIE1vbiBTZXAg MTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBIYW5zIGRlIEdvZWRlIDxoZGVnb2VkZUByZWRoYXQu Y29tPgpEYXRlOiBXZWQsIDEgTm92IDIwMjMgMTE6NTQ6MTggKzAxMDAKU3ViamVjdDogW1BB VENIXSBkcm0vaTkxNS9kc2k6IFJlbW92ZSBHUElPIGxvb2t1cCB0YWJsZSBhdCB0aGUgZW5k IG9mCiBpbnRlbF9kc2lfdmJ0X2dwaW9faW5pdCgpCgpUbyBwcm9wZXJseSBkZWFsIHdpdGgg R1BJT3MgdXNlZCBpbiBNSVBJIHBhbmVsIHNlcXVlbmNlcyBhIHRlbXBvcmFyeQpHUElPIGxv b2t1cCB3aWxsIGJlIHVzZWQuIFNpbmNlIHRoZXJlIGNhbiBvbmx5IGJlIDEgR1BJTyBsb29r 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