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Message-ID: <79afcda4-507f-4439-9093-814a6f6b2926@amd.com>
Date:   Thu, 2 Nov 2023 08:02:36 -0500
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Reply-To: babu.moger@amd.com
Subject: Re: [PATCH v2] x86/resctrl: Fix unused variable warning in
 cache_alloc_hsw_probe()
Content-Language: en-US
To:     Tony Luck <tony.luck@intel.com>
Cc:     "Yu, Fenghua" <fenghua.yu@intel.com>,
        "Chatre, Reinette" <reinette.chatre@intel.com>,
        Peter Newman <peternewman@google.com>,
        "x86@kernel.org" <x86@kernel.org>,
        Shaopeng Tan <tan.shaopeng@fujitsu.com>,
        James Morse <james.morse@arm.com>,
        Jamie Iles <quic_jiles@quicinc.com>,
        Randy Dunlap <rdunlap@infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "patches@lists.linux.dev" <patches@lists.linux.dev>
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From:   "Moger, Babu" <babu.moger@amd.com>
In-Reply-To: <ZULCd/TGJL9Dmncf@agluck-desk3>
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 =?utf-8?B?aDk3ZGlVVFZrNUF0and0K0NlRlQ3UGJuUG0rSGtZRHdVZTYxZlhkbnNKbFoy?=
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 =?utf-8?B?ZDZnQ1NiSU01RWFqdHhHbDFIWHJyNmFMNmx3ODl4RXcvU3Nrd3ltQXVZRHdE?=
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 =?utf-8?B?NDU3Zm5HTHFjd3REeDYyK3pFZDIzWFpvbXV5RWc5K1NaZkxnaURWRXd3bGlx?=
 =?utf-8?B?UjlqOEdhNjZneDlJTytVL1BQcVoralpjZnlEOFYwRXhGYkQzOUVqZmRaeTB3?=
 =?utf-8?B?anBIOGlJWVpoakJyM2hvNlNaRE5xTk9wR3c4T2M2aFB0c2FPMXlEWWFzK1py?=
 =?utf-8?B?OHhPWEt5NysrQXNIdWZTUGxsL3Q1RjExWHBUSzlSaFozQXdOVXhHNkFGVnZ3?=
 =?utf-8?B?WjJSOGhvZ3NpZkYzZDJBU0xrNVVSamdPcUZGemFhY3JNTmo3Tk1XZzIxTlZ0?=
 =?utf-8?B?QUowR2NtMlBZdkdsb3ZpVGFId21RK2IvdVFxQkVpLzdHY05hUTQyTVIwUUJu?=
 =?utf-8?B?REhscTNlYkl3cmdTTUtPOWdEWmppT0tFZFgzQU1aU1RIb1V3UzA2QlVORVAx?=
 =?utf-8?B?b3Q1V3VneHZBN2xxSnE4WEtUeFdmRDNYWFFNbWk2RkNaZklvbWpzcGl6eXY0?=
 =?utf-8?B?WGZrNDdHR3IzR1c0SFdzR1Fmb1NnUVJhVXlkNnlzM0xjbWFGSFFOVDU0LytM?=
 =?utf-8?B?dDU0M201KzRTb0pjeXBrNWl4QkdQR0lJbStYL1BjY0VjdU9vZDU3OXhxMm5x?=
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 =?utf-8?B?MVRqNFFFSjMzVENndVZpUEFOQUNRQmhQUUhkajg1OUs5QStpa2dXNHdNeE12?=
 =?utf-8?B?MmFTK1FkMEpDdlFHWFZUZFFsMjdEcGFoN3JleWxTK1JrcFJ2M2IyTjlwUW5I?=
 =?utf-8?B?Vm9hUEk5UG9ScjVuUDdmNzNZS1d4V1AwbkY0b3JLcFU3NGkxV1MwUjNQOFY0?=
 =?utf-8?B?cmE5NGkxQkR2aG1aMGJYMnp2TktxWFZOR2VnRzEyOFY3UnVsL0o5eWRMcVlL?=
 =?utf-8?B?U21aNWdFVlU5Vm9PTFJuYnBXMnN6SEk1VGFaRktYYldXd0o3TjU5UFc2UFVJ?=
 =?utf-8?B?SWFvYU9iSnU3dGR6b2hVUUVtS1Q1SmpWOHpTTm5WZjZUTndBU0hySkhEd2JR?=
 =?utf-8?B?UUR2UG53QlJIaHcrOVBNeEh6MGV6RjV5VXdHdGsvZExRUW1QbloxSFlnYjl5?=
 =?utf-8?B?cTNOTDB6WmJWckpZZUo0YWtCQkZkL2FyQlNJUFFaTTNYTjNNS29mTCs4S2xU?=
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 =?utf-8?B?WkdBSXlvYXVnVlNpRTJUK29KTXlBcVYwNE12TFQrMnR0dWV0d25jY2l5NmtQ?=
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Looks good.

On 11/1/23 16:26, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
> 
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
> 
> Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr()
> to rdmsrl() using a single u64 argument for the MSR value instead of
> the pair of u32 for the high and low halves.
> 
> Signed-off-by: Tony Luck <tony.luck@intel.com>

Reviewed-by: Babu Moger <babu.moger@amd.com>

> ---
> Changes since v1 (suggested by Babu)
> 
> Switch both the wrmsr() and rdmsr() to the 64-bit versions.
> 
>  arch/x86/kernel/cpu/resctrl/core.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 19e0681f0435..d29ebe345de6 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -136,15 +136,15 @@ static inline void cache_alloc_hsw_probe(void)
>  {
>  	struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
>  	struct rdt_resource *r  = &hw_res->r_resctrl;
> -	u32 l, h, max_cbm = BIT_MASK(20) - 1;
> +	u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0;
>  
> -	if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> +	if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm))
>  		return;
>  
> -	rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> +	rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>  
>  	/* If all the bits were set in MSR, return success */
> -	if (l != max_cbm)
> +	if (l3_cbm_0 != max_cbm)
>  		return;
>  
>  	hw_res->num_closid = 4;

-- 
Thanks
Babu Moger