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Subject: Re: [PATCH v2] RISC-V: Probe misaligned access speed in parallel
From:   patchwork-bot+linux-riscv@kernel.org
Message-Id: <169895643056.22248.6956745778026886386.git-patchwork-notify@kernel.org>
Date:   Thu, 02 Nov 2023 20:20:30 +0000
References: <20230920193801.3035093-1-evan@rivosinc.com>
In-Reply-To: <20230920193801.3035093-1-evan@rivosinc.com>
To:     Evan Green <evan@rivosinc.com>
Cc:     linux-riscv@lists.infradead.org, palmer@rivosinc.com,
        apatel@ventanamicro.com, aou@eecs.berkeley.edu, heiko@sntech.de,
        maz@kernel.org, linux-kernel@vger.kernel.org,
        conor.dooley@microchip.com, David.Laight@aculab.com,
        palmer@dabbelt.com, jszhang@kernel.org, paul.walmsley@sifive.com,
        greentime.hu@sifive.com, ajones@ventanamicro.com
Precedence: bulk

Hello:

This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Wed, 20 Sep 2023 12:38:01 -0700 you wrote:
> Probing for misaligned access speed takes about 0.06 seconds. On a
> system with 64 cores, doing this in smp_callin() means it's done
> serially, extending boot time by 3.8 seconds. That's a lot of boot time.
> 
> Instead of measuring each CPU serially, let's do the measurements on
> all CPUs in parallel. If we disable preemption on all CPUs, the
> jiffies stop ticking, so we can do this in stages of 1) everybody
> except core 0, then 2) core 0.
> 
> [...]

Here is the summary with links:
  - [v2] RISC-V: Probe misaligned access speed in parallel
    https://git.kernel.org/riscv/c/0c37376609da

You are awesome, thank you!
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