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From:   Barry Song <21cnbao@gmail.com>
To:     ryan.roberts@arm.com
Cc:     21cnbao@gmail.com, Steven.Price@arm.com, akpm@linux-foundation.org,
        david@redhat.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org,
        mhocko@suse.com, shy828301@gmail.com, wangkefeng.wang@huawei.com,
        willy@infradead.org, xiang@kernel.org, ying.huang@intel.com,
        yuzhao@google.com
Subject: Re: [PATCH v3 4/4] mm: swap: Swap-out small-sized THP without splitting
Date:   Fri,  3 Nov 2023 11:36:43 +1300
Message-Id: <20231102223643.7733-1-v-songbaohua@oppo.com>
In-Reply-To: <73aad98e-de4c-4021-af3c-db67e06cdb70@arm.com>
References: <73aad98e-de4c-4021-af3c-db67e06cdb70@arm.com>
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> But, yes, it would be nice to fix that! And if I've understood the proble=
m=0D
> correctly, it doesn't sound like it should be too hard? Is this something=
 you=0D
> are volunteering for?? :)=0D
=0D
Unfornately right now I haven't a real hardware with MTE which can run the =
latest=0D
kernel. but i have written a RFC, it will be nice to get someone to test it=
. Let=0D
me figure out if we can get someone :-)=0D
=0D
[RFC PATCH] arm64: mm: swap: save and restore mte tags for large folios=0D
=0D
This patch makes MTE tags saving and restoring support large folios,=0D
then we don't need to split them into base pages for swapping on=0D
ARM64 SoCs with MTE.=0D
=0D
---=0D
 arch/arm64/include/asm/pgtable.h | 21 ++++-----------------=0D
 arch/arm64/mm/mteswap.c          | 20 ++++++++++++++++++++=0D
 2 files changed, 24 insertions(+), 17 deletions(-)=0D
=0D
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta=
ble.h=0D
index 7f7d9b1df4e5..b12783dca00a 100644=0D
--- a/arch/arm64/include/asm/pgtable.h=0D
+++ b/arch/arm64/include/asm/pgtable.h=0D
@@ -45,12 +45,6 @@=0D
 	__flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1)=0D
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */=0D
 =0D
-static inline bool arch_thp_swp_supported(void)=0D
-{=0D
-	return !system_supports_mte();=0D
-}=0D
-#define arch_thp_swp_supported arch_thp_swp_supported=0D
-=0D
 /*=0D
  * Outside of a few very special situations (e.g. hibernation), we always=
=0D
  * use broadcast TLB invalidation instructions, therefore a spurious page=
=0D
@@ -1028,12 +1022,8 @@ static inline pmd_t pmdp_establish(struct vm_area_st=
ruct *vma,=0D
 #ifdef CONFIG_ARM64_MTE=0D
 =0D
 #define __HAVE_ARCH_PREPARE_TO_SWAP=0D
-static inline int arch_prepare_to_swap(struct page *page)=0D
-{=0D
-	if (system_supports_mte())=0D
-		return mte_save_tags(page);=0D
-	return 0;=0D
-}=0D
+#define arch_prepare_to_swap arch_prepare_to_swap=0D
+extern int arch_prepare_to_swap(struct page *page);=0D
 =0D
 #define __HAVE_ARCH_SWAP_INVALIDATE=0D
 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)=0D
@@ -1049,11 +1039,8 @@ static inline void arch_swap_invalidate_area(int typ=
e)=0D
 }=0D
 =0D
 #define __HAVE_ARCH_SWAP_RESTORE=0D
-static inline void arch_swap_restore(swp_entry_t entry, struct folio *foli=
o)=0D
-{=0D
-	if (system_supports_mte())=0D
-		mte_restore_tags(entry, &folio->page);=0D
-}=0D
+#define arch_swap_restore arch_swap_restore=0D
+extern void arch_swap_restore(swp_entry_t entry, struct folio *folio);=0D
 =0D
 #endif /* CONFIG_ARM64_MTE */=0D
 =0D
diff --git a/arch/arm64/mm/mteswap.c b/arch/arm64/mm/mteswap.c=0D
index a31833e3ddc5..e5637e931e4f 100644=0D
--- a/arch/arm64/mm/mteswap.c=0D
+++ b/arch/arm64/mm/mteswap.c=0D
@@ -83,3 +83,23 @@ void mte_invalidate_tags_area(int type)=0D
 	}=0D
 	xa_unlock(&mte_pages);=0D
 }=0D
+=0D
+int arch_prepare_to_swap(struct page *page)=0D
+{=0D
+	if (system_supports_mte()) {=0D
+		struct folio *folio =3D page_folio(page);=0D
+		long i, nr =3D folio_nr_pages(folio);=0D
+		for (i =3D 0; i < nr; i++)=0D
+			return mte_save_tags(folio_page(folio, i));=0D
+	}=0D
+	return 0;=0D
+}=0D
+=0D
+void arch_swap_restore(swp_entry_t entry, struct folio *folio)=0D
+{=0D
+	if (system_supports_mte()) {=0D
+		long i, nr =3D folio_nr_pages(folio);=0D
+		for (i =3D 0; i < nr; i++)=0D
+			mte_restore_tags(entry, folio_page(folio, i));=0D
+	}=0D
+}=0D
-- =0D
2.25.1=0D
=0D
> Thanks,=0D
> Ryan=0D
=0D
Barry=0D