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Message-ID: <d286ae7d-ea83-af3e-7df1-8ad83fdbdc57@amd.com>
Date:   Thu, 2 Nov 2023 17:32:06 -0700
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Subject: Re: [PATCH RFC v3 6/6] cxl/memdev: Register for and process CPER
 events
Content-Language: en-US
To:     Ira Weiny <ira.weiny@intel.com>,
        Dan Williams <dan.j.williams@intel.com>,
        Jonathan Cameron <jonathan.cameron@huawei.com>
Cc:     Yazen Ghannam <yazen.ghannam@amd.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Dave Jiang <dave.jiang@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
        Ard Biesheuvel <ardb@kernel.org>, linux-efi@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org
References: <20230601-cxl-cper-v3-0-0189d61f7956@intel.com>
 <20230601-cxl-cper-v3-6-0189d61f7956@intel.com>
From:   Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
In-Reply-To: <20230601-cxl-cper-v3-6-0189d61f7956@intel.com>
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 =?utf-8?B?M2JNRVhteXZBVW4wTVJORk9JWk1mTGZ6VmNPNWRGRGFVMWFLVWljYXhvOXcw?=
 =?utf-8?B?aXlZTzkrWi9EcjRXVE9RZ2x1VDljaS9DR0RPT0pYeTlVWEZ6OGlKSHkzd05Y?=
 =?utf-8?B?b01BRTBYcm5YekxlVldwd1FySEVnbXgreXNoQTA4RG1WOXdPUnFZZTVOa01E?=
 =?utf-8?B?R3NhdUtNUkIxeGt2VEYrNjFBZG5SZHVYYlJLNkxmSlhCOHQzVGlaMVYwQlNt?=
 =?utf-8?B?eFpCOU9tU3VJTTdIbTI2d1RET3pUVVpCVm1PbjNUcjZYY1J1V2pUN3kxckVo?=
 =?utf-8?B?Qm1CcHNLS3FyQU9QMmd0aGZCMUxZV0E3WlNZaEpwcmpFbXRIUHBNNEJtRC9H?=
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 =?utf-8?B?cXQ0aEdmOE9yYmZrWWJGTDNBWk5pOURyRHNUanpkQmN1QmRPNmZqcDcxeUt4?=
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 =?utf-8?B?Tk5oTDlxRnNicE9Pd0NjcG9RaTdROWFaWThhTW81RGEwY2hIaVcvMnpGVGFR?=
 =?utf-8?B?SE5wQVZVbTFiWmI2UUlmZmlmYU9kTG9HN0Q3RTdyaVQ1NGNTS2NVbENkeHMw?=
 =?utf-8?B?cXdsTUZ0SDZITjIralROS3lhN0w4ejF2Z3d3QWN5SjdDK21LQmNVemtYaVNS?=
 =?utf-8?B?TGNsb3dZUTJwRHI5NDBORk5xTVZ1aEYxZDhBVmpsS3puUUw2VnFMZmVjZ29K?=
 =?utf-8?B?eDhoTXpHUTJWTGpZdlZGU01lY0t4Z2RFaVpCQnhyeEJrbVdLUHBKS2RTaXFZ?=
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On 11/1/2023 2:11 PM, Ira Weiny wrote:

[snip]

> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 44a21ab7add5..37add91068c0 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -1,5 +1,6 @@
>   // SPDX-License-Identifier: GPL-2.0-only
>   /* Copyright(c) 2020 Intel Corporation. All rights reserved. */
> +#include <asm-generic/unaligned.h>
>   #include <linux/io-64-nonatomic-lo-hi.h>
>   #include <linux/moduleparam.h>
>   #include <linux/module.h>
> @@ -748,6 +749,60 @@ static bool cxl_event_int_is_fw(u8 setting)
>   	return mode == CXL_INT_FW;
>   }
>   
> +#define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0)
> +static int cxl_cper_event_call(struct notifier_block *nb, unsigned long action,
> +			       void *data)
> +{
> +	struct cxl_cper_notifier_data *nd = data;
> +	struct cper_cxl_event_devid *device_id = &nd->rec->hdr.device_id;
> +	enum cxl_event_log_type log_type;
> +	struct cxl_memdev_state *mds;
> +	struct cxl_dev_state *cxlds;
> +	struct pci_dev *pdev;
> +	unsigned int devfn;
> +	u32 hdr_flags;
> +
> +	mds = container_of(nb, struct cxl_memdev_state, cxl_cper_nb);
> +
> +	/* PCI_DEVFN() would require 2 extra bit shifts; skip those */
> +	devfn = (device_id->slot_num & 0xfff8) | (device_id->func_num & 0x07);

devfn = PCI_DEVFN(device_id->device_num, device_id->func_num) should 
also work correct?

> +	pdev = pci_get_domain_bus_and_slot(device_id->segment_num,
> +					   device_id->bus_num, devfn);
> +	cxlds = pci_get_drvdata(pdev);
> +	if (cxlds != &mds->cxlds) {

Do we need a error message here?

Thanks,
Smita

> +		pci_dev_put(pdev);
> +		return NOTIFY_DONE;
> +	}
> +
> +	/* Fabricate a log type */
> +	hdr_flags = get_unaligned_le24(nd->rec->event.generic.hdr.flags);
> +	log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags);
> +
> +	cxl_event_trace_record(mds->cxlds.cxlmd, log_type, nd->event_type,
> +			       &nd->rec->event);
> +	pci_dev_put(pdev);
> +	return NOTIFY_OK;
> +}
> +
> +static void cxl_unregister_cper_events(void *_mds)
> +{
> +	struct cxl_memdev_state *mds = _mds;
> +
> +	unregister_cxl_cper_notifier(&mds->cxl_cper_nb);
> +}
> +
> +static void register_cper_events(struct cxl_memdev_state *mds)
> +{
> +	mds->cxl_cper_nb.notifier_call = cxl_cper_event_call;
> +
> +	if (register_cxl_cper_notifier(&mds->cxl_cper_nb)) {
> +		dev_err(mds->cxlds.dev, "CPER registration failed\n");
> +		return;
> +	}
> +
> +	devm_add_action_or_reset(mds->cxlds.dev, cxl_unregister_cper_events, mds);
> +}
> +
>   static int cxl_event_config(struct pci_host_bridge *host_bridge,
>   			    struct cxl_memdev_state *mds)
>   {
> @@ -758,8 +813,10 @@ static int cxl_event_config(struct pci_host_bridge *host_bridge,
>   	 * When BIOS maintains CXL error reporting control, it will process
>   	 * event records.  Only one agent can do so.
>   	 */
> -	if (!host_bridge->native_cxl_error)
> +	if (!host_bridge->native_cxl_error) {
> +		register_cper_events(mds);
>   		return 0;
> +	}
>   
>   	rc = cxl_mem_alloc_event_buf(mds);
>   	if (rc)
>