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From:   Bibo Mao <maobibo@loongson.cn>
To:     Tianrui Zhao <zhaotianrui@loongson.cn>,
        Huacai Chen <chenhuacai@kernel.org>
Cc:     WANG Xuerui <kernel@xen0n.name>, kvm@vger.kernel.org,
        loongarch@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/3] LoongArch: KVM: Remove SW timer switch during
Date:   Sat,  4 Nov 2023 16:57:52 +0800
Message-Id: <20231104085755.930439-1-maobibo@loongson.cn>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

This patches removes SW timer switch during vcpu block stage. VM uses HW
timer rather than SW PV timer on LoongArch system, it can check HW timer
pending interrupt status directly, rather than switch to SW timer and
check injected SW timer interrupt.

When SW timer is not used in vcpu block polling status, the relative
SW timer handling before entering guest can be removed also. Timer
emulation is simpler than before, SW timer emuation is only used in vcpu
thread context switch.

Bibo Mao (3):
  LoongArch: KVM: Remove SW timer switch during vcpu block flow
  LoongArch: KVM: Allow to access HW timer CSR registers always
  LoongArch: KVM: Remove kvm_acquire_timer before entering guest

 arch/loongarch/include/asm/kvm_vcpu.h |  1 -
 arch/loongarch/kvm/exit.c             | 11 +-----
 arch/loongarch/kvm/main.c             |  1 -
 arch/loongarch/kvm/timer.c            | 48 ++++++++-------------------
 arch/loongarch/kvm/vcpu.c             | 38 +++++----------------
 5 files changed, 22 insertions(+), 77 deletions(-)


base-commit: 8f6f76a6a29f36d2f3e4510d0bde5046672f6924
-- 
2.39.3