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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Andrew Cooper <andrew.cooper3@citrix.com>,
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Subject: Re: Notes on BAD_APICID, Was: [PATCH 0/3] x86/apic: Misc pruning
In-Reply-To: <36462e78-8014-4415-bc47-86fbb46d028b@citrix.com>
References: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com>
 <36462e78-8014-4415-bc47-86fbb46d028b@citrix.com>
Date:   Sat, 04 Nov 2023 20:15:05 +0100
Message-ID: <87zfztib46.ffs@tglx>
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On Fri, Nov 03 2023 at 19:58, Andrew Cooper wrote:
> On 02/11/2023 12:26 pm, Andrew Cooper wrote:
> Another dodgy construct spotted while doing this work is
>
> #ifdef CONFIG_X86_32
> =C2=A0#define BAD_APICID 0xFFu
> #else
> =C2=A0#define BAD_APICID 0xFFFFu
> #endif
>
> considering that both of those "bad" values are legal APIC IDs in an
> x2APIC system.
>
> The majority use is as a sentential (of varying types - int, u16
> mostly), although the uses for NUM_APIC_CLUSTERS, and
> safe_smp_processor_id() look suspect.
>
> In particular, safe_smp_processor_id() *will* malfunction on some legal
> CPUs, and needs to use -1 (32 bits wide) to spot the intended error case
> of a bad xAPIC mapping.
>
> However, it's use in amd_pmu_cpu_starting() from topology_die_id() looks
> broken.=C2=A0 Partly because the error handling is (only) a WARN_ON_ONCE(=
),
> and also because nb->nb_id's sentinel value is -1 of type int.
>
> I suspect there's a lot of cleaning to be done here too.

Sigh...