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References: <20231106092202.11127-1-tomeu@tomeuvizoso.net>
 <569e39a0-b91c-46f1-b55d-c9324d66339b@linaro.org>
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From:   Jerome Brunet <jbrunet@baylibre.com>
To:     Neil Armstrong <neil.armstrong@linaro.org>,
        Tomeu Vizoso <tomeu@tomeuvizoso.net>,
        linux-kernel@vger.kernel.org
Cc:     Lucas Stach <l.stach@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Kevin Hilman <khilman@baylibre.com>,
        Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        "moderated list:ARM/Amlogic Meson SoC support" 
        <linux-arm-kernel@lists.infradead.org>,
        "open list:ARM/Amlogic Meson SoC support" 
        <linux-amlogic@lists.infradead.org>
Subject: Re: [PATCH RESEND] arm64: dts: VIM3: Set the rates of the clocks
 for the NPU
Date:   Mon, 06 Nov 2023 11:41:48 +0100
In-reply-to: <569e39a0-b91c-46f1-b55d-c9324d66339b@linaro.org>
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On Mon 06 Nov 2023 at 10:26, Neil Armstrong <neil.armstrong@linaro.org> wrote:

> On 06/11/2023 10:22, Tomeu Vizoso wrote:

patch title is misleading. It does not target the vim3 only but all g12
and sm1 HWs.

It should start with "arm64: dts: amlogic: g12: " instead

>> Otherwise they are left at 24MHz and the NPU runs very slowly.
>> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
>> Suggested-by: Lucas Stach <l.stach@pengutronix.de>
>> ---
>>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 3 +++
>>   1 file changed, 3 insertions(+)
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> index ff68b911b729..9d5eab6595d0 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> @@ -2502,6 +2502,9 @@ npu: npu@ff100000 {
>>   		clocks = <&clkc CLKID_NNA_CORE_CLK>,
>>   			 <&clkc CLKID_NNA_AXI_CLK>;
>>   		clock-names = "core", "bus";
>> +		assigned-clocks = <&clkc CLKID_NNA_CORE_CLK>,
>> +				  <&clkc CLKID_NNA_AXI_CLK>;
>> +		assigned-clock-rates = <800000000>, <800000000>;
>>   		resets = <&reset RESET_NNA>;
>>   		status = "disabled";
>>   	};
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>