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Date:   Wed, 29 Nov 2023 14:11:34 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Elad Nachman <enachman@marvell.com>
Cc:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "conor+dt@kernel.org" <conor+dt@kernel.org>,
        "gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
        "sebastian.hesselbarth@gmail.com" <sebastian.hesselbarth@gmail.com>,
        "pali@kernel.org" <pali@kernel.org>,
        "mrkiko.rs@gmail.com" <mrkiko.rs@gmail.com>,
        "chris.packham@alliedtelesis.co.nz" 
        <chris.packham@alliedtelesis.co.nz>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        Yuval Caduri <cyuval@marvell.com>
Subject: Re: [EXT] Re: [PATCH v6 3/3] arm64: dts: cn913x: add device trees
 for COM Express boards
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> > Now i'm confused. What does rd mean?
> > 
> > I would expect RD mean Reference Design, and that is the complete device in
> > its box.
> 
> AC5X RD can either work as you would expect, as a complete standalone box using the internal CPU, or you can move the switch on the back of the box to "external" mode, and connect via an external cable a kit which would allow it to use an external CPU COM Express module, mounted on top of an interposer kit.
> 
> > 
> > Yet, here you have RD for the carrier?
> > 
> > The box itself is called cn9131-ac5x-carrier?
> > 
> > This makes no sense to me.
> > 
> > Maybe i'm understanding this all wrong, and its the carrier which you are
> > producing a reference design for? The CPU module does not really matter? I
> 
> So in this case, once the switch is set to external as explained above, the AC5X RD becomes part of the carrier solution.
> This is a development/reference solution, not a full commercial solution, hence it has the flexibility to be configured in different modes of operation.

O.K, now this make more sense. Please expand the documentation, in
particularly the carrier, explaining how it can be used, and the .dts
file about it giving a complete system, but again the carrier is the
focus.

Is the internal CPU open? Or is it a black box which only Marvell
Firmware can use? I'm just wondering if we will need another .dtsi
file describing the internal CPU, and a .dts file which includes both
the carrier and the internal CPU .dtsi to give an image you can boot
on the carrier?

	Andrew