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Wed, 29 Nov 2023 13:13:14 +0000 Message-ID: <994c4c2e-63c1-40ab-a270-325c8a5f5f39@intel.com> Date: Wed, 29 Nov 2023 14:12:31 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v5 01/14] page_pool: make sure frag API fields don't span between cachelines Content-Language: en-US To: Yunsheng Lin CC: Paul Menzel , Maciej Fijalkowski , Jesper Dangaard Brouer , Larysa Zaremba , , Alexander Duyck , Ilias Apalodimas , , Eric Dumazet , Michal Kubiak , , David Christensen , Jakub Kicinski , Paolo Abeni , "David S. Miller" References: <20231124154732.1623518-1-aleksander.lobakin@intel.com> <20231124154732.1623518-2-aleksander.lobakin@intel.com> <9902d1c4-5e51-551a-3b66-c078c217c5ad@huawei.com> <5e6859d3-d3e7-44c1-acee-2c4ec568615d@intel.com> From: Alexander Lobakin In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR4P281CA0394.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:cf::12) To DM6PR11MB3625.namprd11.prod.outlook.com (2603:10b6:5:13a::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6PR11MB3625:EE_|SJ0PR11MB4832:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ddb7a98-186e-4570-3188-08dbf0dcf167 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5tE6Cor2kuTHLuToEpbCj+8kUB4n3CqFc9gXx+nf1XoGeplMJKcTq1KGGZiTGa4wmgt/wf7eW4uZ2Fn8l4ITVzq1c0EPMqvR/ubj6gqHPAdac6ayrMz8h7Nvpk1WABwr4KUrn1rxCr1rLP0sMIUhRUhCnMe+/D452E5t2zUpJIYYjJCuXmFLYH5ns8N8TcOe+FFQpp5FrRV22PBeq8ZVgdpTb+r72HF0JD7ge47I/guPfe3pE29USXmQK5cEH/5v/6drOZozUtyVfVJiRKnLakoBf6bxgR2j+A8o8GD2lo6V7Tg4NncEDreCe/a16Lb8St9cE/Q0Zz7/m5B354q8HCAIAbaqfnhe5RkS3ALggUdWpFIM2WVYg1nR/ARjyyhuL0lIC6v+qAE/rLkyQo5DApbgeNsjF0QCp9N88iuSzI1a+GjFSOQzTXaAPAFPkVSBlUX8xYa0yRGnaaGCWI8VtVBu+UyBOVB91t8/VDXy/7FvtgmxZSnXCwrrLyqtB65c/RPSv6rV+yQ/QFfh7a/feq6STuYx08p0nsGS7q0gYKHLce4yEt/q0awBT7SstClkUhkq3V1QHgiQh2dbHZe5k61XBVN4ZvLaxDbCx+TBbpo4ZApAjhD7e7Lu0LzRELFXk5F3e9ALEWgyhDM8CAHi6w== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM6PR11MB3625.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(346002)(376002)(366004)(136003)(396003)(39860400002)(230922051799003)(1800799012)(186009)(451199024)(64100799003)(6666004)(6512007)(6506007)(6486002)(8936002)(53546011)(478600001)(66476007)(316002)(66946007)(66556008)(4326008)(31686004)(6916009)(54906003)(8676002)(86362001)(31696002)(26005)(2616005)(2906002)(83380400001)(36756003)(41300700001)(82960400001)(38100700002)(5660300002)(7416002)(45980500001)(43740500002);DIR:OUT;SFP:1102; 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Wed, 29 Nov 2023 05:13:55 -0800 (PST) From: Yunsheng Lin Date: Wed, 29 Nov 2023 10:55:00 +0800 > On 2023/11/27 22:08, Alexander Lobakin wrote: >> From: Yunsheng Lin >> Date: Sat, 25 Nov 2023 20:29:22 +0800 >> >>> On 2023/11/24 23:47, Alexander Lobakin wrote: >>>> After commit 5027ec19f104 ("net: page_pool: split the page_pool_params >>>> into fast and slow") that made &page_pool contain only "hot" params at >>>> the start, cacheline boundary chops frag API fields group in the middle >>>> again. >>>> To not bother with this each time fast params get expanded or shrunk, >>>> let's just align them to `4 * sizeof(long)`, the closest upper pow-2 to >>>> their actual size (2 longs + 2 ints). This ensures 16-byte alignment for >>>> the 32-bit architectures and 32-byte alignment for the 64-bit ones, >>>> excluding unnecessary false-sharing. >>>> >>>> Signed-off-by: Alexander Lobakin >>>> --- >>>> include/net/page_pool/types.h | 2 +- >>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/include/net/page_pool/types.h b/include/net/page_pool/types.h >>>> index e1bb92c192de..989d07b831fc 100644 >>>> --- a/include/net/page_pool/types.h >>>> +++ b/include/net/page_pool/types.h >>>> @@ -127,7 +127,7 @@ struct page_pool { >>>> >>>> bool has_init_callback; >>> >>> It seems odd to have only a slow field between tow fast >>> field group, isn't it better to move it to the end of >>> page_pool or where is more appropriate? >> >> 1. There will be more in the subsequent patches. >> 2. ::has_init_callback happens each new page allocation, it's not slow. >> Jakub did put it here for purpose. >> >>> >>>> >>>> - long frag_users; >>>> + long frag_users __aligned(4 * sizeof(long)); >>> >>> If we need that, why not just use '____cacheline_aligned_in_smp'? >> >> It can be an overkill. We don't need a full cacheline, but only these >> fields to stay within one, no matter whether they are in the beginning >> of it or at the end. > > I am still a little lost here, A comment explaining why using '4' in the > above would be really helpful here. The block is: 2 longs (users, frag pointer) and 2 ints (offset, cnt). On 32-bit architectures, longs == ints, so that this effectively means 4 longs. On 64-bit architectures, long is 8 bytes and int is 4, so that the value becomes 2 * 8 + 2 * 4 = 24, but the alignment must be a pow-2. The closest pow-2 to 24 is 32, which equals to 4 * 8 = 4 longs. At the end, regardless of the architecture, the desired alignment would end up as 4 * longs. As I wrote earlier, we could do something like __aligned(roundup_pow_of_2(2 * sizeof(long) + 2 * sizeof(int))) but doesn't that seem ugly as hell? As I replied to Jakub, I'll add a comment in the code (so that you wouldn't need refer to the Git history / commit message) in the next version. Thanks, Olek