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From:   Elad Nachman <enachman@marvell.com>
To:     Andrew Lunn <andrew@lunn.ch>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "conor+dt@kernel.org" <conor+dt@kernel.org>,
        "gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
        "sebastian.hesselbarth@gmail.com" <sebastian.hesselbarth@gmail.com>,
        "pali@kernel.org" <pali@kernel.org>,
        "mrkiko.rs@gmail.com" <mrkiko.rs@gmail.com>,
        "chris.packham@alliedtelesis.co.nz" 
        <chris.packham@alliedtelesis.co.nz>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        Yuval Caduri <cyuval@marvell.com>
Subject: RE: [EXT] Re: [PATCH v6 3/3] arm64: dts: cn913x: add device trees for
 COM Express boards
Thread-Topic: [EXT] Re: [PATCH v6 3/3] arm64: dts: cn913x: add device trees
 for COM Express boards
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Date:   Wed, 29 Nov 2023 13:33:29 +0000
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> -----Original Message-----
> From: Andrew Lunn <andrew@lunn.ch>
> Sent: Wednesday, November 29, 2023 3:12 PM
> To: Elad Nachman <enachman@marvell.com>
> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; gregory.clement@bootlin.com;
> sebastian.hesselbarth@gmail.com; pali@kernel.org; mrkiko.rs@gmail.com;
> chris.packham@alliedtelesis.co.nz; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yuval Cadur=
i
> <cyuval@marvell.com>
> Subject: Re: [EXT] Re: [PATCH v6 3/3] arm64: dts: cn913x: add device tree=
s for
> COM Express boards
>=20
> > > Now i'm confused. What does rd mean?
> > >
> > > I would expect RD mean Reference Design, and that is the complete
> > > device in its box.
> >
> > AC5X RD can either work as you would expect, as a complete standalone
> > box using the internal CPU, or you can move the switch on the back of t=
he
> > box to "external" mode, and connect via an external cable a kit which w=
ould
> > allow it to use an external CPU COM Express module, mounted on top of a=
n
> > interposer kit.
> >
> > >
> > > Yet, here you have RD for the carrier?
> > >
> > > The box itself is called cn9131-ac5x-carrier?
> > >
> > > This makes no sense to me.
> > >
> > > Maybe i'm understanding this all wrong, and its the carrier which
> > > you are producing a reference design for? The CPU module does not
> > > really matter? I
> >
> > So in this case, once the switch is set to external as explained above,=
 the
> AC5X RD becomes part of the carrier solution.
> > This is a development/reference solution, not a full commercial solutio=
n,
>> hence it has the flexibility to be configured in different modes of oper=
ation.
>=20
> O.K, now this make more sense. Please expand the documentation, in
> particularly the carrier, explaining how it can be used, and the .dts fil=
e about
> it giving a complete system, but again the carrier is the focus.

Will add comments on the dts and dtsi files on the next patch version.

>=20
> Is the internal CPU open? Or is it a black box which only Marvell Firmwar=
e
> can use? I'm just wondering if we will need another .dtsi file describing=
 the
> internal CPU, and a .dts file which includes both the carrier and the int=
ernal
> CPU .dtsi to give an image you can boot on the carrier?

When the board boots in the internal (standalone) CPU mode, the following d=
ts, which is
Already upstreamed, is to be used to boot Linux on the internal, standalone=
 CPU:

arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts

When the board boots in the external CPU mode, the internal CPU
is disabled, and only the switch portion of the SOC acts as a PCIe end-poin=
t,
Hence there is little use to describe a CPU which is disabled.

In this mode, the AC5X RD carrier portion only provides a non-CPU PCIe end-=
point to the
COM Express CPU module (in this case, containing the CN9131 CPU).
There is no CPU booting in this mode on the carrier, only on the COM Expres=
s
CPU module.
What runs the Linux is the CN9131 on the COM Express CPU module,
And it accesses the switch end-point on the AC5X RD portion of the carrier =
via PCIe.

This is briefly documented (will elaborate further in next patch version) i=
n the following file covered in the patch:
arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi

>=20
> 	Andrew

FYI,

Elad.