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charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 14 Nov 2023 23:00:43 -0800 (PST) On Wed, Nov 15, 2023 at 11:49=E2=80=AFAM Joshua Yeong wrote: > > Add clocksource detach/shutdown callback to disable RISC-V timer interrup= t when > switching out riscv timer as clock source > > Signed-off-by: Joshua Yeong > --- > drivers/clocksource/timer-riscv.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/time= r-riscv.c > index da3071b387eb..588a05459b6a 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -50,12 +50,19 @@ static int riscv_clock_next_event(unsigned long delta= , > return 0; > } > > +static int riscv_clock_shutdown(struct clock_event_device *evt) > +{ > + sbi_set_timer(-1); Use riscv_clock_event_stop() here. > + return 0; > +} > + > static unsigned int riscv_clock_event_irq; > static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) =3D = { > .name =3D "riscv_timer_clockevent", > .features =3D CLOCK_EVT_FEAT_ONESHOT, > .rating =3D 100, > .set_next_event =3D riscv_clock_next_event, > + .set_state_shutdown =3D riscv_clock_shutdown, > }; > > /* > -- > 2.25.1 > Regards, Anup