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[23.128.96.37]) by mx.google.com with ESMTPS id h126-20020a636c84000000b00578d460cd7esi9558647pgc.431.2023.11.15.03.49.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Nov 2023 03:49:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 50BDF8153D30; Wed, 15 Nov 2023 03:49:31 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343610AbjKOLta (ORCPT + 99 others); Wed, 15 Nov 2023 06:49:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343585AbjKOLt3 (ORCPT ); Wed, 15 Nov 2023 06:49:29 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 176F211D; Wed, 15 Nov 2023 03:49:23 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 1B2A67F8A; Wed, 15 Nov 2023 19:49:20 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 15 Nov 2023 19:49:20 +0800 Received: from ubuntu.localdomain (183.27.97.246) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 15 Nov 2023 19:49:19 +0800 From: Minda Chen To: Conor Dooley , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , "Daire McNamara" , Emil Renner Berthing , Krzysztof Kozlowski CC: , , , , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v11 06/20] PCI: microchip: Move PCIe host data structures to plda-pcie.h Date: Wed, 15 Nov 2023 19:48:58 +0800 Message-ID: <20231115114912.71448-7-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231115114912.71448-1-minda.chen@starfivetech.com> References: <20231115114912.71448-1-minda.chen@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [183.27.97.246] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 15 Nov 2023 03:49:31 -0800 (PST) Move the common data structures definition to head file for these two data structures can be re-used. Signed-off-by: Minda Chen Reviewed-by: Conor Dooley --- .../pci/controller/plda/pcie-microchip-host.c | 20 ------------------ drivers/pci/controller/plda/pcie-plda.h | 21 +++++++++++++++++++ 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c index 3dc4d4ca9d0c..261147a0a446 100644 --- a/drivers/pci/controller/plda/pcie-microchip-host.c +++ b/drivers/pci/controller/plda/pcie-microchip-host.c @@ -21,9 +21,6 @@ #include "../../pci.h" #include "pcie-plda.h" -/* Number of MSI IRQs */ -#define PLDA_MAX_NUM_MSI_IRQS 32 - /* PCIe Bridge Phy and Controller Phy offsets */ #define MC_PCIE1_BRIDGE_ADDR 0x00008000u #define MC_PCIE1_CTRL_ADDR 0x0000a000u @@ -179,23 +176,6 @@ struct event_map { u32 event_bit; }; -struct plda_msi { - struct mutex lock; /* Protect used bitmap */ - struct irq_domain *msi_domain; - struct irq_domain *dev_domain; - u32 num_vectors; - u64 vector_phy; - DECLARE_BITMAP(used, PLDA_MAX_NUM_MSI_IRQS); -}; - -struct plda_pcie_rp { - struct device *dev; - struct irq_domain *intx_domain; - struct irq_domain *event_domain; - raw_spinlock_t lock; - struct plda_msi msi; - void __iomem *bridge_addr; -}; struct mc_pcie { struct plda_pcie_rp plda; diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h index 727fc54312c9..363fcbbaf6ec 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -6,6 +6,9 @@ #ifndef _PCIE_PLDA_H #define _PCIE_PLDA_H +/* Number of MSI IRQs */ +#define PLDA_MAX_NUM_MSI_IRQS 32 + /* PCIe Bridge Phy Regs */ #define PCIE_PCI_IRQ_DW0 0xa8 #define MSIX_CAP_MASK BIT(31) @@ -99,4 +102,22 @@ #define EVENT_PM_MSI_INT_SYS_ERR 12 #define NUM_PLDA_EVENTS 13 +struct plda_msi { + struct mutex lock; /* Protect used bitmap */ + struct irq_domain *msi_domain; + struct irq_domain *dev_domain; + u32 num_vectors; + u64 vector_phy; + DECLARE_BITMAP(used, PLDA_MAX_NUM_MSI_IRQS); +}; + +struct plda_pcie_rp { + struct device *dev; + struct irq_domain *intx_domain; + struct irq_domain *event_domain; + raw_spinlock_t lock; + struct plda_msi msi; + void __iomem *bridge_addr; +}; + #endif -- 2.17.1