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From:   Bibo Mao <maobibo@loongson.cn>
To:     Tianrui Zhao <zhaotianrui@loongson.cn>,
        Huacai Chen <chenhuacai@kernel.org>
Cc:     WANG Xuerui <kernel@xen0n.name>, kvm@vger.kernel.org,
        loongarch@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH v4 0/3] LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
Date:   Thu, 16 Nov 2023 10:30:33 +0800
Message-Id: <20231116023036.2324371-1-maobibo@loongson.cn>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

This patches removes SW timer switch during vcpu block stage. VM uses HW
timer rather than SW PV timer on LoongArch system, it can check pending
HW timer interrupt status directly, rather than switch to SW timer and
check injected SW timer interrupt.

When SW timer is not used in vcpu halt-polling mode, the relative
SW timer handling before entering guest can be removed also. Timer
emulation is simpler than before, SW timer emuation is only used in vcpu
thread context switch.
---
Changes in v4:
  If vcpu is scheduled out since there is no pending event, and timer is
fired during sched-out period. SW hrtimer is used to wake up vcpu thread
in time, rather than inject pending timer irq.

Changes in v3:
  Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.

Changes in v2:
  Add halt polling support for idle instruction emulation, using api
kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.

---
Bibo Mao (3):
  LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
  LoongArch: KVM: Allow to access HW timer CSR registers always
  LoongArch: KVM: Remove kvm_acquire_timer before entering guest

 arch/loongarch/include/asm/kvm_vcpu.h |  1 -
 arch/loongarch/kvm/exit.c             | 13 +-----
 arch/loongarch/kvm/main.c             |  1 -
 arch/loongarch/kvm/timer.c            | 62 ++++++++++-----------------
 arch/loongarch/kvm/vcpu.c             | 38 ++++------------
 5 files changed, 32 insertions(+), 83 deletions(-)


base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
-- 
2.39.3