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Message-ID: <6a44ac62-50a8-4f31-9504-10a0d12791f4@quicinc.com>
Date:   Thu, 16 Nov 2023 15:35:12 +0800
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Subject: Re: [PATCH v3 2/6] net: phy: introduce core support for phy-mode =
 "10g-qxgmii"
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To:     Conor Dooley <conor@kernel.org>
CC:     <andrew@lunn.ch>, <davem@davemloft.net>, <edumazet@google.com>,
        <kuba@kernel.org>, <pabeni@redhat.com>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <hkallweit1@gmail.com>, <linux@armlinux.org.uk>, <corbet@lwn.net>,
        <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>
References: <20231115140630.10858-1-quic_luoj@quicinc.com>
 <20231115140630.10858-3-quic_luoj@quicinc.com>
 <20231115-tightness-naturist-459776cff199@squawk>
From:   Jie Luo <quic_luoj@quicinc.com>
In-Reply-To: <20231115-tightness-naturist-459776cff199@squawk>
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On 11/15/2023 10:31 PM, Conor Dooley wrote:
> On Wed, Nov 15, 2023 at 10:06:26PM +0800, Luo Jie wrote:
>> From: Vladimir Oltean <vladimir.oltean@nxp.com>
>>
>> 10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
>> specification. It uses the same signaling as USXGMII, but it multiplexes
>> 4 ports over the link, resulting in a maximum speed of 2.5G per port.
>>
>> Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
>> either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
>> they could get away just fine with that thus far. But there is a need to
>> distinguish between the 2 as far as SerDes drivers are concerned.
>>
>> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
>> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
>> ---
>>   .../devicetree/bindings/net/ethernet-controller.yaml |  1 +
> 
> I know it is one line, but bindings need to be in their own patches
> please.

Ok, will split the binding change out as a separate patch.
Thanks Conor for the suggestion.