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Message-ID: <8608e88e-e379-4e08-b376-86d9f25d2270@quicinc.com>
Date:   Thu, 16 Nov 2023 18:44:14 +0800
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Subject: Re: [PATCH 8/9] net: mdio: ipq4019: add qca8084 configurations
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To:     Konrad Dybcio <konrad.dybcio@linaro.org>,
        Andrew Lunn <andrew@lunn.ch>
CC:     <agross@kernel.org>, <andersson@kernel.org>, <davem@davemloft.net>,
        <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <conor+dt@kernel.org>, <hkallweit1@gmail.com>,
        <linux@armlinux.org.uk>, <robert.marko@sartura.hr>,
        <linux-arm-msm@vger.kernel.org>, <netdev@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <quic_srichara@quicinc.com>
References: <20231115032515.4249-1-quic_luoj@quicinc.com>
 <20231115032515.4249-9-quic_luoj@quicinc.com>
 <a1954855-f82d-434b-afd1-aa05c7a1b39b@lunn.ch>
 <cb4131d1-534d-4412-a562-fb26edfea0d1@linaro.org>
From:   Jie Luo <quic_luoj@quicinc.com>
In-Reply-To: <cb4131d1-534d-4412-a562-fb26edfea0d1@linaro.org>
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On 11/16/2023 1:01 AM, Konrad Dybcio wrote:
> 
> 
> On 11/15/23 17:20, Andrew Lunn wrote:
>> On Wed, Nov 15, 2023 at 11:25:14AM +0800, Luo Jie wrote:
>>> The PHY & PCS clocks need to be enabled and the reset
>>> sequence needs to be completed to make qca8084 PHY
>>> probeable by MDIO bus.
>>
>> Is all this guaranteed to be the same between different boards?
> No, this looks like a total subsystem overreach, these should be
> taken care of from within clk framework and consumed with the clk
> APIs.
> 
> Konrad

Hi Konrad,
As Robert shared the link of the clock provider driver, which is
registered as MDIO device and not available until to the qca8084
initializations completed done here, so i need to do raw read/write
the clock registers in this patch.