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Thu, 16 Nov 2023 10:45:13 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AGAjCPA020603 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 10:45:12 GMT Received: from [10.253.72.184] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Thu, 16 Nov 2023 02:45:08 -0800 Message-ID: Date: Thu, 16 Nov 2023 18:45:08 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/9] net: mdio: ipq4019: add qca8084 configurations Content-Language: en-US To: Robert Marko , Konrad Dybcio CC: Andrew Lunn , , , , , , , , , , , , , , , , References: <20231115032515.4249-1-quic_luoj@quicinc.com> <20231115032515.4249-9-quic_luoj@quicinc.com> From: Jie Luo In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: -Pmi1yOGF26K2sh-JzE56hA-2ceYXk4Q X-Proofpoint-ORIG-GUID: -Pmi1yOGF26K2sh-JzE56hA-2ceYXk4Q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-16_09,2023-11-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 phishscore=0 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 suspectscore=0 spamscore=0 mlxlogscore=774 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311160085 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 16 Nov 2023 02:45:43 -0800 (PST) On 11/16/2023 1:03 AM, Robert Marko wrote: > On Wed, Nov 15, 2023 at 6:01 PM Konrad Dybcio wrote: >> >> >> >> On 11/15/23 17:20, Andrew Lunn wrote: >>> On Wed, Nov 15, 2023 at 11:25:14AM +0800, Luo Jie wrote: >>>> The PHY & PCS clocks need to be enabled and the reset >>>> sequence needs to be completed to make qca8084 PHY >>>> probeable by MDIO bus. >>> >>> Is all this guaranteed to be the same between different boards? >> No, this looks like a total subsystem overreach, these should be >> taken care of from within clk framework and consumed with the clk >> APIs. >> >> Konrad > > There are patches for QCA8084 clocks: > https://patchwork.kernel.org/project/linux-arm-msm/cover/20231104034858.9159-1-quic_luoj@quicinc.com/ > > I guess all of the clocking should be done there, it isn't really a MDIO issue. > > Regards, > Robert > Thanks Robert for the link of this patch. Yes, the clock driver of qca8084 is probed as the MDIO device, the configuration sequence here to lighten the qca8084 PHY need to be completed before the clock APIs available to call.