Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37;
MIME-Version: 1.0
References: <20231116105312.4800-1-joshua.yeong@starfivetech.com>
In-Reply-To: <20231116105312.4800-1-joshua.yeong@starfivetech.com>
From:   Anup Patel <anup@brainfault.org>
Date:   Thu, 16 Nov 2023 17:21:51 +0530
Message-ID: <CAAhSdy2EvimCN_RfzXY_iEv_d0MtzFmEk8-0SYbuWfcmGmt8Hg@mail.gmail.com>
Subject: Re: [PATCH v3 1/1] clocksource/timer-riscv: Add riscv_clock_shutdown callback
To:     Joshua Yeong <joshua.yeong@starfivetech.com>
Cc:     daniel.lezcano@linaro.org, tglx@linutronix.de,
        paul.walmsley@sifive.com, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, leyfoon.tan@starfivetech.com,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Thu, Nov 16, 2023 at 4:24=E2=80=AFPM Joshua Yeong
<joshua.yeong@starfivetech.com> wrote:
>
> Add clocksource detach/shutdown callback to disable RISC-V timer interrup=
t when
> switching out riscv timer as clock source
>
> Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>

Please include Rb tags obtained in previous revisions.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  drivers/clocksource/timer-riscv.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/time=
r-riscv.c
> index 57857c0dfba9..e66dcbd66566 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -61,12 +61,19 @@ static int riscv_clock_next_event(unsigned long delta=
,
>         return 0;
>  }
>
> +static int riscv_clock_shutdown(struct clock_event_device *evt)
> +{
> +       riscv_clock_event_stop();
> +       return 0;
> +}
> +
>  static unsigned int riscv_clock_event_irq;
>  static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) =3D =
{
>         .name                   =3D "riscv_timer_clockevent",
>         .features               =3D CLOCK_EVT_FEAT_ONESHOT,
>         .rating                 =3D 100,
>         .set_next_event         =3D riscv_clock_next_event,
> +       .set_state_shutdown     =3D riscv_clock_shutdown,
>  };
>
>  /*
> --
> 2.25.1
>