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Thu, 16 Nov 2023 05:14:01 -0800 (PST) Received: by archie.me (Postfix, from userid 1000) id 0D69C10D76D28; Thu, 16 Nov 2023 20:13:55 +0700 (WIB) Date: Thu, 16 Nov 2023 20:13:55 +0700 From: Bagas Sanjaya To: Thomas =?utf-8?Q?Hellstr=C3=B6m?= , intel-xe@lists.freedesktop.org Cc: Rodrigo Vivi , Matthew Brost , Danilo Krummrich , Joonas Lahtinen , Oak Zeng , Daniel Vetter , Maarten Lankhorst , Francois Dugast , Boris Brezillon , Linux DRI Development , Linux Kernel Mailing List , Linux Documentation Subject: Re: [PATCH v4] Documentation/gpu: VM_BIND locking document Message-ID: References: <20231115124937.6740-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231115124937.6740-1-thomas.hellstrom@linux.intel.com> X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Thu, 16 Nov 2023 05:14:36 -0800 (PST) On Wed, Nov 15, 2023 at 01:49:37PM +0100, Thomas Hellström wrote: > +TODO: Pointer to the gpuvm code implementation if this iteration and "... implementation of this iteration ..." > +Using a MMU notifier for device DMA (and other methods) is described in > +`this document > +`_. You can use internal linking instead: ---- >8 ---- diff --git a/Documentation/core-api/pin_user_pages.rst b/Documentation/core-api/pin_user_pages.rst index d3c1f6d8c0e0ec..6b5f7e6e7155fb 100644 --- a/Documentation/core-api/pin_user_pages.rst +++ b/Documentation/core-api/pin_user_pages.rst @@ -153,6 +153,8 @@ NOTE: Some pages, such as DAX pages, cannot be pinned with longterm pins. That's because DAX pages do not have a separate page cache, and so "pinning" implies locking down file system blocks, which is not (yet) supported in that way. +.. _mmu-notifier-registration-case: + CASE 3: MMU notifier registration, with or without page faulting hardware ------------------------------------------------------------------------- Device drivers can pin pages via get_user_pages*(), and register for mmu diff --git a/Documentation/gpu/drm-vm-bind-locking.rst b/Documentation/gpu/drm-vm-bind-locking.rst index bc701157cb3414..08b6a47a6e592f 100644 --- a/Documentation/gpu/drm-vm-bind-locking.rst +++ b/Documentation/gpu/drm-vm-bind-locking.rst @@ -366,8 +366,7 @@ need to care about, but so far it has proven difficult to exclude certain notifications. Using a MMU notifier for device DMA (and other methods) is described in -`this document -`_. +:ref:`pin_user_pages() documentation `. Now the method of obtaining struct page references using get_user_pages() unfortunately can't be used under a dma_resv lock Thanks. -- An old man doll... just what I always wanted! - Clara