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Message-ID: <3067f0bc-7479-380e-0528-b307c34a40cd@quicinc.com>
Date:   Fri, 17 Nov 2023 09:57:13 +0530
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Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add SC8380XP pinctrl
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To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
        <linus.walleij@linaro.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>
CC:     <agross@kernel.org>, <conor+dt@kernel.org>,
        <quic_rjendra@quicinc.com>, <abel.vesa@linaro.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
        <quic_tsoni@quicinc.com>, <neil.armstrong@linaro.org>
References: <20231025135058.11268-1-quic_sibis@quicinc.com>
 <20231025135058.11268-2-quic_sibis@quicinc.com>
 <c987222a-9ce7-4adb-aae8-0ae016e7c7d3@linaro.org>
From:   Sibi Sankar <quic_sibis@quicinc.com>
In-Reply-To: <c987222a-9ce7-4adb-aae8-0ae016e7c7d3@linaro.org>
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Precedence: bulk

Hey Krzysztof,

On 10/27/23 13:55, Krzysztof Kozlowski wrote:
> On 25/10/2023 15:50, Sibi Sankar wrote:
>> From: Rajendra Nayak <quic_rjendra@quicinc.com>
>>
>> Add device tree binding Documentation details for Qualcomm SC8380XP TLMM
>> device
>>
> 
> 
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    tlmm: pinctrl@f100000 {
>> +        compatible = "qcom,sc8380xp-tlmm";
>> +        reg = <0x0f100000 0xf00000>;
>> +        gpio-controller;
>> +        #gpio-cells = <2>;
>> +        gpio-ranges = <&tlmm 0 0 239>;
> 
> Is the 239 number a mistake or do you include here UFS reset?

We seem to be including UFS reset on all the previous Qaulcomm SoCs, so
continuing the same here.

-Sibi

> 
> Best regards,
> Krzysztof
>