Received: by 2002:a05:7412:b130:b0:e2:908c:2ebd with SMTP id az48csp376838rdb; Fri, 17 Nov 2023 01:03:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IHYvqJTeW3JYlxDrqsArltvx2d2LsMKGwgC2QqJhH/Z0bv6wXtWeoxGk2Y20TrNYTH5Q+Vv X-Received: by 2002:a05:6808:21a0:b0:3b2:f192:5a6b with SMTP id be32-20020a05680821a000b003b2f1925a6bmr24771486oib.16.1700211785477; Fri, 17 Nov 2023 01:03:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700211785; cv=none; d=google.com; s=arc-20160816; b=aa8KVNADwJPWajwH+nAYuUndUmhn1ClXC+Nr/snQa6pbhGsb1hWI8H8zri8YGQNUs1 wQnES7KRK7yCDR4QdrVYMd2bm2t+/vTBh557CgrnKA+sgonQ48SkzO8HmhiztA4pSCTL 6KmxmldzQ/yy8cJTaI2d0W8WaRcQpOEWRmzJcGsUi4Nbf4pzoNulfs3HFXBI0xQAdTjq ceaZynLmLjZiibeEInpqb6H0CP9oukgNsi7cNoPYZfjpQHImdOkpTxbR4Q6AgqFUFmVf 2I9G9PwRSzlJQtJd5QZTW1cEHUH/Lcyg3cAFFzkEU7akPGzy9zKgroO96N1g6aQDnsKR kZIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:mail-followup-to:message-id:subject:cc:to:from:date :dkim-signature; bh=9l8YIXvr1qCb4mjD4T+dzZsbd0D1nt4OOpppCFXT1bE=; fh=vjOO8eKTSaxPNDKhP63fHOarcrRgwGqC8bQRaDn6VmM=; b=UU7mXyBaXbwUHVCV2EQoQWG4hcrp+X5mnju31s2AkkJx8o5RYV5inndr/PF/hoYkp9 oXXOU/oWijRO4mjwfqLaZl118CydTW7AX948SVPxltY7qz9n5b5cY9oZ5osmLbb+m0yq f5uwW/h4FftBcFEfd8qMDHZ+/02w5CJqcAlWgrZMdNfgw0UPp26ZE3yEyBRAXdIuwb5X DlVhNJVQNnG7XvFJi4zXfrHcD0KdoqKzGeCzatVG8CSIyH1Lz/pINlQohAgWTaPtsJ+W zj3DZSQMioP8F0WEn8UHmKclmH6/ggG46aYur9hs4bFktLLpoPXEaesG6NJRsMEGkxs7 mkrA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=quZWRCfE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Return-Path: Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id d16-20020a634f10000000b005c1cd418245si1424941pgb.737.2023.11.17.01.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 01:03:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=quZWRCfE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 2E1A081CFF09; Fri, 17 Nov 2023 01:03:02 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230316AbjKQJCo (ORCPT + 99 others); Fri, 17 Nov 2023 04:02:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbjKQJCn (ORCPT ); Fri, 17 Nov 2023 04:02:43 -0500 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CDC311F; Fri, 17 Nov 2023 01:02:38 -0800 (PST) Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3AH5IQSR030464; Fri, 17 Nov 2023 10:02:09 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= date:from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=selector1; bh=9l8YIXvr1qCb4mjD4T+dz Zsbd0D1nt4OOpppCFXT1bE=; b=quZWRCfEARhxtxImgE/22rUGQWRFKFiXH/f9c ugAWKAgOQj2eZtLDZomMdVgDLuFjnwq72+YOsmBRqup9VrdzvXfav2Edr60CToDu 97r75SRBfh9h8N8IB88K6B7bFaXw1wobs95yKyPdcHiEp3XNYos/ZQ1Qtt+qLBfv pGpu+q07MUF+efJSqTFsa4uBBm/VvwzGiZU9kwFkI72fPDJKS8HyNk57RQpiENqL EQ5M3aXLp60SW+8zYjG0tMg+5vBkFJ1WDPVUq9BSYKFOceozMre6ls9zuIdREVlx 3iXKJlvf+4ILXTpmGDhvciRmdAKULgDrFwQL3sAr3nlY+EGMg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ua1u2a9kw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 10:02:09 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AB89110002A; Fri, 17 Nov 2023 10:02:07 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A2F7D211603; Fri, 17 Nov 2023 10:02:07 +0100 (CET) Received: from gnbcxd0016.gnb.st.com (10.129.178.213) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 17 Nov 2023 10:02:07 +0100 Date: Fri, 17 Nov 2023 10:02:06 +0100 From: Alain Volmat To: Pavel Machek CC: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Jacopo Mondi , Kieran Bingham , Rob Herring , , , Subject: Re: [PATCH v3 3/3] media: i2c: gc2145: Galaxy Core GC2145 sensor support Message-ID: <20231117090206.GB523678@gnbcxd0016.gnb.st.com> Mail-Followup-To: Pavel Machek , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Jacopo Mondi , Kieran Bingham , Rob Herring , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20231107081345.3172392-1-alain.volmat@foss.st.com> <20231107081345.3172392-4-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-Disclaimer: ce message est personnel / this message is private X-Originating-IP: [10.129.178.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-17_06,2023-11-16_01,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 17 Nov 2023 01:03:02 -0800 (PST) Hi Pavel, On Sat, Nov 11, 2023 at 08:22:07PM +0100, Pavel Machek wrote: > Hi! > > > Addition of support for the Galaxy Core GC2145 XVGA sensor. > > The sensor supports both DVP and CSI-2 interfaces however for > > the time being only CSI-2 is implemented. > > > > Configurations is currently based on initialization scripts > > "are"? Fixed > > > coming from Galaxy Core and for that purpose only 3 static > > "and so"? Fixed > > > resolutions are supported. > > "supported:"? Fixed > > > - 640x480 > > - 1280x720 > > - 1600x1200 > > > > --- /dev/null > > +++ b/drivers/media/i2c/gc2145.c > > @@ -0,0 +1,1404 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * A V4L2 driver for Galaxycore GC2145 camera. > > + * Copyright (C) 2023, STMicroelectronics SA > > + * > > + * Inspired from the imx219.c driver > > "by the"? Fixed > > Link to some kind of datasheet / documentation /... would be welcome > here. Seems an old version of the datasheet is available on pine64.org so I guess I could add a link to this one. http://files.pine64.org/doc/datasheet/PinebookPro/GC2145%20CSP%20DataSheet%20release%20V1.0_20131201.pdf > > > +/** > > + * struct gc2145_mode - GC2145 mode description > > + * @width: frame width (in pixel) > > + * @height: frame height (in pixel) > > "in pixels". Ok > > > +static const struct gc2145_mode supported_modes[] = { > ... > > + { > > + /* 1280x720 30fps mode */ > > + .width = 1280, > > + .height = 720, > > + .reg_seq = gc2145_mode_1280_720_regs, > > + .reg_seq_size = ARRAY_SIZE(gc2145_mode_1280_720_regs), > > + .pixel_rate = GC2145_1280_720_PIXELRATE, > > + .crop = { > > + .top = 160, > > + .left = 240, > > + .width = 1280, > > + .height = 720, > > + }, > > + .hblank = GC2145_1280_720_HBLANK, > > + .vblank = GC2145_1280_720_VBLANK, > > + }, > > Won't this result in 1120x480 mode due to crop? The crop struct indicates the top left corner and width/height so this leads to 720p mode. > > > +/* All supported formats */ > > +static const struct gc2145_format supported_formats[] = { > > + { > > + .code = MEDIA_BUS_FMT_UYVY8_1X16, > > + .code = MEDIA_BUS_FMT_VYUY8_1X16, > > + .code = MEDIA_BUS_FMT_YUYV8_1X16, > > + .code = MEDIA_BUS_FMT_YVYU8_1X16, > > + .code = MEDIA_BUS_FMT_RGB565_1X16, > > +}; > > So ... the hardware can do 10bit ADC, but we don't actually have a > mode exposing that? We don't have YET (in the driver). Choice is to have this first serie with only non-RAW modes. RAW8/10 will be added later on. > > > + * Adjust the MIPI buffer settings. > > + * For YUV/RGB, LWC = image width * 2 > > + * For RAW8, LWC = image width > > + * For RAW10, LWC = image width * 1.25 > > + */ > > + lwc = gc2145->mode->width * 2; > > + cci_write(gc2145->regmap, GC2145_REG_LWC_HIGH, lwc >> 8, &ret); > > + cci_write(gc2145->regmap, GC2145_REG_LWC_LOW, lwc & 0xff, &ret); > > + > > + /* > > + * Adjust the MIPI Fifo Full Level > > Fifo -> FIFO? Ok > > > + /* > > + * Set the fifo gate mode / MIPI wdiv set: > > + * 0xf1 in case of RAW mode and 0xf0 otherwise > > + */ > > fifo -> FIFO? Ok > > > + /* > > + * Datasheet doesn't mention timing between PWDN/RESETB control and > > + * i2c access however experimentation shows that a rather big delay is > > + * needed > > + */ > > "however," "needed." Ok > > > +static const struct v4l2_ctrl_ops gc2145_ctrl_ops = { > > + .s_ctrl = gc2145_s_ctrl, > > +}; > > + > > +/* Initialize control handlers */ > > +static int gc2145_init_controls(struct gc2145 *gc2145) > > +{ > > + ret = v4l2_ctrl_handler_init(hdl, 12); > > + if (ret) > > + return ret; > > + > > + ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, > > + GC2145_640_480_PIXELRATE, > > + GC2145_1280_720_PIXELRATE, 1, > > Should the second pixelrate be one from 1600x1200? Indeed. This will actually evolve in the v4 since I implemented instead the V4L2_CID_LINK_FREQ control. > > > +static int gc2145_check_hwcfg(struct device *dev) > > +{ > > + struct fwnode_handle *endpoint; > > + struct v4l2_fwnode_endpoint ep_cfg = { > > + .bus_type = V4L2_MBUS_CSI2_DPHY > > + }; > > + int ret = -EINVAL; > > This "ret" value is unused. Not sure if something will warn about this. Corrected. > > > +MODULE_AUTHOR("Alain Volmat > ">" is missing at the end of address. Done. > > The driver looks good, thank you! > > Best regards, > Pavel > -- > People of Russia, stop Putin before his war on Ukraine escalates. Regards, Alain