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From:   Victor Shih <victorshihgli@gmail.com>
Date:   Fri, 17 Nov 2023 18:50:08 +0800
Message-ID: <CAK00qKBdkn2zqZx6Z-NO4Kx5GV4S94Wt3h1McZSJTqA7KcKhcQ@mail.gmail.com>
Subject: Re: [PATCH V12 16/23] mmc: sdhci-uhs2: add clock operations
To:     Ulf Hansson <ulf.hansson@linaro.org>
Cc:     adrian.hunter@intel.com, linux-mmc@vger.kernel.org,
        linux-kernel@vger.kernel.org, benchuanggli@gmail.com,
        HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw,
        takahiro.akashi@linaro.org, dlunev@chromium.org,
        Ben Chuang <ben.chuang@genesyslogic.com.tw>,
        Victor Shih <victor.shih@genesyslogic.com.tw>
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On Tue, Oct 3, 2023 at 7:13=E2=80=AFPM Ulf Hansson <ulf.hansson@linaro.org>=
 wrote:
>
> On Fri, 15 Sept 2023 at 11:44, Victor Shih <victorshihgli@gmail.com> wrot=
e:
> >
> > From: Victor Shih <victor.shih@genesyslogic.com.tw>
> >
> > This is a sdhci version of mmc's uhs2_[enable|disable]_clk operations.
> >
> > Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> > Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
> > Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
> > Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>
> The similar comments as posted for patch 15 applies to $subject patch
> too. Please have a look at those and fix these for the $subject patch
> too.
>

Hi, Ulf

I will merge patch#15, patch#16 and patch#17 into one patch(patch#15)
for version 13.

Thanks, Victor Shih

> > ---
> >
> > Updates in V8:
> >  - Remove unnecessary include file.
> >  - read_poll_timeout() to instead of read_poll_timeout_atomic()
> >    in sdhci_uhs2_enable_clk().
> >  - Put the comment on the end and put the lines in descending
> >    line length in sdhci_uhs2_enable_clk().
> >  - Modify return value in sdhci_uhs2_enable_clk().
> >
> > Updates in V6:
> >  - Remove unnecessary functions.
> >
> > ---
> >
> >  drivers/mmc/host/sdhci-uhs2.c | 30 ++++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs=
2.c
> > index 4c2a56629ab3..af1b0c5e48fd 100644
> > --- a/drivers/mmc/host/sdhci-uhs2.c
> > +++ b/drivers/mmc/host/sdhci-uhs2.c
> > @@ -329,6 +329,36 @@ static int sdhci_uhs2_set_ios(struct mmc_host *mmc=
, struct mmc_ios *ios)
> >         return 0;
> >  }
> >
> > +static int sdhci_uhs2_disable_clk(struct mmc_host *mmc)
> > +{
> > +       struct sdhci_host *host =3D mmc_priv(mmc);
> > +       u16 clk =3D sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> > +
> > +       clk &=3D ~SDHCI_CLOCK_CARD_EN;
> > +       sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> > +
> > +       return 0;
> > +}
> > +
> > +static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
> > +{
> > +       struct sdhci_host *host =3D mmc_priv(mmc);
> > +       u16 clk =3D sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> > +       int timeout_us =3D 20000; /* 20ms */
> > +       u32 val;
> > +
> > +       clk |=3D SDHCI_CLOCK_CARD_EN;
> > +       sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> > +
> > +       if (read_poll_timeout(sdhci_readw, val, (val & SDHCI_CLOCK_INT_=
STABLE),
> > +                             10, timeout_us, true, host, SDHCI_CLOCK_C=
ONTROL)) {
> > +               pr_err("%s: Internal clock never stabilised.\n", mmc_ho=
stname(host->mmc));
> > +               sdhci_dumpregs(host);
> > +               return -EIO;
> > +       }
> > +       return 0;
> > +}
> > +
> >  /*********************************************************************=
********\
> >   *                                                                    =
       *
> >   * Driver init/exit                                                   =
       *
>
> Kind regards
> Uffe