Received: by 2002:a05:7412:b130:b0:e2:908c:2ebd with SMTP id az48csp490950rdb; Fri, 17 Nov 2023 04:59:57 -0800 (PST) X-Google-Smtp-Source: AGHT+IFXv2/rt93MnAxw4elQDoqVR6qBokXT9OaLFtowjRrQhohp/QLgUxZFagmWARGu+A0VTmsL X-Received: by 2002:a17:902:a38e:b0:1c6:11ca:8861 with SMTP id x14-20020a170902a38e00b001c611ca8861mr6110979pla.21.1700225997090; Fri, 17 Nov 2023 04:59:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700225997; cv=none; d=google.com; s=arc-20160816; b=TNEZkJT0+FwCuz8VcMpGPUbRw1v26CbEhc4/i4z5bsAlwp2pJQeQ8A9VJLJuc1pGto 6blChwKgeJOEkikTtDgoFkBDqGjSZZSCeDpUpwe7geAC61v1Hy9Dv5YHHu6SFZnTLTee wIDydwotKOO3mmCmzwEj3E5kmxOTeObI5lF5wH3UNwXAYr7YRrPKIQvLu+ziJ6PJowIj GADUBbtVecBsh2avGsEjXyBCKf4m4q4dt290gYWtZ+IGcdfQ5QGa3l3RRhJa8hWSLee+ VAiunzlzFOReXsd7qdhNjPv2lDmlXDYMPXWkzel7+s/AdgSZ8UprrpKGFotVisw6al2p SPbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fOigh6xEIHsnetURZKAyAV1p94v8dqGGYbyO3VKINpU=; fh=njdjvPz/8fUgTR5XHfg4rgXpBE+Eb+Wz3ojami6fduM=; b=MX1dzCdPS3NqJC/+aXLCEdTP4eExF0vf87SjY5dIMWBxFyBK9uEeVjyo/b5aKVGK1l wbwRZ8kvy9PcxGj4QZUstF1hb/WuMhGSUI3kbaJjmm1QRBzi+TgE1+jRC80cL+wEVNzg dNdMkLztObh2HOOeX5vgs2TLa+AUSxzO3Y6jRCBeX7UAS1StMfLnmKarS2qMYas9lYiK BbSHTsp4uhcntJZnsQfIQEe9aYgYfyqJEEQq0v8m0p6Ucld6+X90WvpQz5pNGKAHFOg6 qPOiVLnQUA/b0JOT+CnhvpmjsisKPYSBzX+h8Y7JO/6gcjAww7OfQ/kSFzxjFe5RdQVK n5XQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=WjLuh8mq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id j10-20020a17090276ca00b001cc1af09466si1730266plt.125.2023.11.17.04.59.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 04:59:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=WjLuh8mq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id D3E7D829BC5A; Fri, 17 Nov 2023 04:59:54 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235739AbjKQM7w (ORCPT + 99 others); Fri, 17 Nov 2023 07:59:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346026AbjKQM7m (ORCPT ); Fri, 17 Nov 2023 07:59:42 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46467D57 for ; Fri, 17 Nov 2023 04:59:37 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-409299277bbso14304725e9.2 for ; Fri, 17 Nov 2023 04:59:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1700225976; x=1700830776; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fOigh6xEIHsnetURZKAyAV1p94v8dqGGYbyO3VKINpU=; b=WjLuh8mqqidS7hRxr1e/y+b7V7XhNJ1cIMceR/WoqvPUWBZPOdzfjwTNUqVUcAXiwm jHK3Z3YVfUCWxJ48py1gOJ7NPqe5soMks6bOLWfvr1Aa5VoHdON4N1Qxjxo3tCDiMV6n O4rVBCT98sQHASudO8QXIk4IqopBnVWfPiSMnUrOr8kf8ap+hm+KikTQEkDau2P/nTYe UeI/DIUfyt4mrGMYnhsbYTu/zpv6ooXKnTYECakmCAou/bCJYoffrkqqJ16Ad9s8GmL1 gbFhYYI38/Tm8du6qYTTxlVw3fWYNOmDktPkWTOE8wYVh4p0w1ZLDm/GwZhkjooi+rz2 GTuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700225976; x=1700830776; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fOigh6xEIHsnetURZKAyAV1p94v8dqGGYbyO3VKINpU=; b=Ben6qk4KfpzpxHFBnDJYi0cbYOYypl3DWZMSygopzFX2MxXTV7z9CIJ77Bobaj5AsQ GJkyVKmsNINeabOoTfiIKdxALz6jDPCErcjCV8Uf/nfYae8cfA5m2vW2k7mQvGsD9JS/ XVM74dcz6/okc8nAqB7SRuwEj3NR+HnlxESr/0kmBhTWY5yq1NdqkkjL93KTW4hku8rk ztGswKZrNZMjSCoyaXO9zqUV12z0Q6dvWuHHm4zVzVnyD5bmyP6Rq4tN1GwlzO3IWrje 8Ksx9++lK3WG7VYFHUhrvA0myWVUCMYMVIdJ+a6TOYI774ULNvYthGc7V8kv5kmLm3+T KnlQ== X-Gm-Message-State: AOJu0Yzee9skT7Y0Pwa1B189p/0QSNGkLfMoNA6D3v1V6/sJGEm3vDYF SQsvIzH/2bM0V2RZhFPmNBCe3Q== X-Received: by 2002:a7b:c8d7:0:b0:40a:2796:61a0 with SMTP id f23-20020a7bc8d7000000b0040a279661a0mr14432533wml.33.1700225975631; Fri, 17 Nov 2023 04:59:35 -0800 (PST) Received: from toaster.lan ([2a01:e0a:3c5:5fb1:8196:e423:38cb:9a09]) by smtp.googlemail.com with ESMTPSA id k21-20020a05600c1c9500b0040a487758dcsm2671343wms.6.2023.11.17.04.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 04:59:35 -0800 (PST) From: Jerome Brunet To: Thierry Reding , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jerome Brunet , Kevin Hilman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao Subject: [PATCH v2 4/6] pwm: meson: add generic compatible for meson8 to sm1 Date: Fri, 17 Nov 2023 13:59:14 +0100 Message-ID: <20231117125919.1696980-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231117125919.1696980-1-jbrunet@baylibre.com> References: <20231117125919.1696980-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Fri, 17 Nov 2023 04:59:55 -0800 (PST) Introduce a new compatible support in the Amlogic PWM driver. The PWM HW is actually the same for all SoCs supported so far. A specific compatible is needed only because the clock sources of the PWMs are hard-coded in the driver. It is better to have the clock source described in DT but this changes the bindings so a new compatible must be introduced. When all supported platform have migrated to the new compatible, support for the legacy ones may be removed from the driver. Adding a callback to setup the clock will also make it easier to add support for the new PWM HW found in a1, s4, c3 and t7 SoC families Signed-off-by: Jerome Brunet --- drivers/pwm/pwm-meson.c | 224 ++++++++++++++++++++++++---------------- 1 file changed, 133 insertions(+), 91 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 5cbd65cae28a..d5d745a651d3 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -95,6 +95,7 @@ struct meson_pwm_channel { struct meson_pwm_data { const char * const *parent_names; + int (*channels_init)(struct device *dev); }; struct meson_pwm { @@ -333,95 +334,6 @@ static const struct pwm_ops meson_pwm_ops = { .get_state = meson_pwm_get_state, }; -static const char * const pwm_meson8b_parent_names[] = { - "xtal", NULL, "fclk_div4", "fclk_div3" -}; - -static const struct meson_pwm_data pwm_meson8b_data = { - .parent_names = pwm_meson8b_parent_names, -}; - -/* - * Only the 2 first inputs of the GXBB AO PWMs are valid - * The last 2 are grounded - */ -static const char * const pwm_gxbb_ao_parent_names[] = { - "xtal", "clk81", NULL, NULL, -}; - -static const struct meson_pwm_data pwm_gxbb_ao_data = { - .parent_names = pwm_gxbb_ao_parent_names, -}; - -static const char * const pwm_axg_ee_parent_names[] = { - "xtal", "fclk_div5", "fclk_div4", "fclk_div3" -}; - -static const struct meson_pwm_data pwm_axg_ee_data = { - .parent_names = pwm_axg_ee_parent_names, -}; - -static const char * const pwm_axg_ao_parent_names[] = { - "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" -}; - -static const struct meson_pwm_data pwm_axg_ao_data = { - .parent_names = pwm_axg_ao_parent_names, -}; - -static const char * const pwm_g12a_ao_ab_parent_names[] = { - "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5" -}; - -static const struct meson_pwm_data pwm_g12a_ao_ab_data = { - .parent_names = pwm_g12a_ao_ab_parent_names, -}; - -static const char * const pwm_g12a_ao_cd_parent_names[] = { - "xtal", "g12a_ao_clk81", NULL, NULL, -}; - -static const struct meson_pwm_data pwm_g12a_ao_cd_data = { - .parent_names = pwm_g12a_ao_cd_parent_names, -}; - -static const struct of_device_id meson_pwm_matches[] = { - { - .compatible = "amlogic,meson8b-pwm", - .data = &pwm_meson8b_data - }, - { - .compatible = "amlogic,meson-gxbb-pwm", - .data = &pwm_meson8b_data - }, - { - .compatible = "amlogic,meson-gxbb-ao-pwm", - .data = &pwm_gxbb_ao_data - }, - { - .compatible = "amlogic,meson-axg-ee-pwm", - .data = &pwm_axg_ee_data - }, - { - .compatible = "amlogic,meson-axg-ao-pwm", - .data = &pwm_axg_ao_data - }, - { - .compatible = "amlogic,meson-g12a-ee-pwm", - .data = &pwm_meson8b_data - }, - { - .compatible = "amlogic,meson-g12a-ao-pwm-ab", - .data = &pwm_g12a_ao_ab_data - }, - { - .compatible = "amlogic,meson-g12a-ao-pwm-cd", - .data = &pwm_g12a_ao_cd_data - }, - {}, -}; -MODULE_DEVICE_TABLE(of, meson_pwm_matches); - static int meson_pwm_init_clocks_legacy(struct device *dev, struct clk_parent_data *mux_parent_data) { @@ -528,12 +440,15 @@ static int meson_pwm_init_clocks_legacy(struct device *dev, return 0; } -static int meson_pwm_init_channels(struct device *dev) +static int meson_pwm_init_channels_legacy(struct device *dev) { struct clk_parent_data mux_parent_data[MESON_NUM_MUX_PARENTS] = {}; struct meson_pwm *meson = dev_get_drvdata(dev); int i; + dev_info(dev, "using obsolete compatible, please consider updating dt\n"); + + for (i = 0; i < MESON_NUM_MUX_PARENTS; i++) { mux_parent_data[i].index = -1; mux_parent_data[i].name = meson->data->parent_names[i]; @@ -542,6 +457,133 @@ static int meson_pwm_init_channels(struct device *dev) return meson_pwm_init_clocks_legacy(dev, mux_parent_data); } +static int meson_pwm_init_channels_meson8b_v2(struct device *dev) +{ + struct clk_parent_data mux_parent_data[MESON_NUM_MUX_PARENTS] = {}; + int i; + + /* + * NOTE: Instead of relying on the hard coded names in the driver + * as the legacy version, this relies on DT to provide the list of + * clocks. + * For once, using input numbers actually makes more sense than names. + * Also DT requires clock-names to be explicitly ordered, so there is + * no point bothering with clock names in this case. + */ + for (i = 0; i < MESON_NUM_MUX_PARENTS; i++) + mux_parent_data[i].index = i; + + return meson_pwm_init_clocks_legacy(dev, mux_parent_data); +} + +static const char * const pwm_meson8b_parent_names[] = { + "xtal", NULL, "fclk_div4", "fclk_div3" +}; + +static const struct meson_pwm_data pwm_meson8b_data = { + .parent_names = pwm_meson8b_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +/* + * Only the 2 first inputs of the GXBB AO PWMs are valid + * The last 2 are grounded + */ +static const char * const pwm_gxbb_ao_parent_names[] = { + "xtal", "clk81", NULL, NULL, +}; + +static const struct meson_pwm_data pwm_gxbb_ao_data = { + .parent_names = pwm_gxbb_ao_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +static const char * const pwm_axg_ee_parent_names[] = { + "xtal", "fclk_div5", "fclk_div4", "fclk_div3" +}; + +static const struct meson_pwm_data pwm_axg_ee_data = { + .parent_names = pwm_axg_ee_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +static const char * const pwm_axg_ao_parent_names[] = { + "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" +}; + +static const struct meson_pwm_data pwm_axg_ao_data = { + .parent_names = pwm_axg_ao_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +static const char * const pwm_g12a_ao_ab_parent_names[] = { + "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5" +}; + +static const struct meson_pwm_data pwm_g12a_ao_ab_data = { + .parent_names = pwm_g12a_ao_ab_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +static const char * const pwm_g12a_ao_cd_parent_names[] = { + "xtal", "g12a_ao_clk81", NULL, NULL, +}; + +static const struct meson_pwm_data pwm_g12a_ao_cd_data = { + .parent_names = pwm_g12a_ao_cd_parent_names, + .channels_init = meson_pwm_init_channels_legacy, +}; + +static const struct meson_pwm_data pwm_meson8_v2_data = { + .channels_init = meson_pwm_init_channels_meson8b_v2, +}; + +static const struct of_device_id meson_pwm_matches[] = { + { + .compatible = "amlogic,meson8-pwm-v2", + .data = &pwm_meson8_v2_data + }, + /* + * The following compatibles are obsolete. + * Support for these may be removed once the related + * platforms have been updated + */ + { + .compatible = "amlogic,meson8b-pwm", + .data = &pwm_meson8b_data + }, + { + .compatible = "amlogic,meson-gxbb-pwm", + .data = &pwm_meson8b_data + }, + { + .compatible = "amlogic,meson-gxbb-ao-pwm", + .data = &pwm_gxbb_ao_data + }, + { + .compatible = "amlogic,meson-axg-ee-pwm", + .data = &pwm_axg_ee_data + }, + { + .compatible = "amlogic,meson-axg-ao-pwm", + .data = &pwm_axg_ao_data + }, + { + .compatible = "amlogic,meson-g12a-ee-pwm", + .data = &pwm_meson8b_data + }, + { + .compatible = "amlogic,meson-g12a-ao-pwm-ab", + .data = &pwm_g12a_ao_ab_data + }, + { + .compatible = "amlogic,meson-g12a-ao-pwm-cd", + .data = &pwm_g12a_ao_cd_data + }, + {}, +}; +MODULE_DEVICE_TABLE(of, meson_pwm_matches); + static int meson_pwm_probe(struct platform_device *pdev) { struct meson_pwm *meson; @@ -573,7 +615,7 @@ static int meson_pwm_probe(struct platform_device *pdev) return -ENODEV; } - err = meson_pwm_init_channels(&pdev->dev); + err = meson->data->channels_init(&pdev->dev); if (err < 0) return err; -- 2.42.0