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Sat, 18 Nov 2023 13:33:00 -0600 From: Yazen Ghannam To: CC: , , , , , , , "Yazen Ghannam" Subject: [PATCH 02/20] x86/mce: Define mce_setup() helpers for global and per-CPU fields Date: Sat, 18 Nov 2023 13:32:30 -0600 Message-ID: <20231118193248.1296798-3-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231118193248.1296798-1-yazen.ghannam@amd.com> References: <20231118193248.1296798-1-yazen.ghannam@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4A:EE_|CO6PR12MB5427:EE_ X-MS-Office365-Filtering-Correlation-Id: d276c711-0b7f-4bdc-3b5f-08dbe86d30f7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: TPSQKxVrJWN05VZW7fkiIB+gWdW76GE/XMwCaUQNNBAqy1KN+nIDghzMaLtOSdm0yJsrR5O0/KpUS7+TkYCpNN2Y4Aic1ei+EHdtyh7UfN8m0TTI1t77/BMXhYgdhOm/hP47taYC9g8XXa0VUnsFf2f1bgoCYjWS7QXJZFZXP2mTD5wJrxmSGLpF63z6x070FARFu2s8z8/eL+q5s3+lA22cdrEVJ84Hgeb5w2oyqu6S4TiZwjPCbs8aNfbZMO5jbHQ2NjpqOi2NuYlRK/Hkt0ZrMpt0ES3mvDokFg0FDnDDWDjuxyqi9NofDyaETUg1FLjHPgqYLpWBcHeGgIP2LuQwvj6IL8i55JtjzKeYB5eH4yJ/wKSEkBEa7G16URQxTXH1DEZO3jdCefxFwylIvoAxH8vZDTW8a1CZKEfylhSr/CnVoeaTc9eLU1T1lQW81UxqXY0t93xHDrdWCSc8GU16RvlRekuwnLE/oaEfLmsxTyC21vQYsH4fbJtc39GaTqKFLDMYepLw71e/Rq8LA7EIHOx4qoTW4tjde6o2W0oGLNvmKz2x5mIN03HTZaNCgE73ps4PJg+SUK3p7DfD3ZiTQQBU/SOE8VtKZfeBi35wugFFvn9Md6HrEbKnaTViinW7NqaHe8s+r1dXdIlIo9nVmbHjHL/ypjJTUeUMG52Zv8yELxa8T96aoLQnLrji8zZyNs3Aef2/CZlMGd1eUCgAntu3GTvIdnTVi3IxkzAsxJMwGFxoArR1vVECth13db9bFxs1o1wEr6zSjMiyMQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(39860400002)(376002)(346002)(230922051799003)(451199024)(64100799003)(82310400011)(186009)(1800799012)(40470700004)(46966006)(36840700001)(2906002)(41300700001)(8936002)(8676002)(4326008)(40460700003)(316002)(5660300002)(44832011)(86362001)(36756003)(2616005)(1076003)(83380400001)(16526019)(336012)(426003)(26005)(82740400003)(6666004)(7696005)(81166007)(356005)(47076005)(36860700001)(40480700001)(478600001)(6916009)(54906003)(70206006)(70586007)(36900700001);DIR:OUT;SFP:1101; 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Sat, 18 Nov 2023 11:33:31 -0800 (PST) Generally, MCA information for an error is gathered on the CPU that reported the error. In this case, CPU-specific information from the running CPU will be correct. However, this will be incorrect if the MCA information is gathered while running on a CPU that didn't report the error. One example is creating an MCA record using mce_setup() for errors reported from ACPI. Split mce_setup() so that there is a helper function to gather global, i.e. not CPU-specific, information and another helper for CPU-specific information. Don't set the CPU number in either helper function. This will be set appropriately for each call site of the helpers. Leave mce_setup() defined as-is for the common case when running on the reporting CPU. Get MCG_CAP in the global helper even though the register is per-CPU. This value is not already cached per-CPU like other values. And it does not assist with any per-CPU decoding or handling. Signed-off-by: Yazen Ghannam --- arch/x86/kernel/cpu/mce/core.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index 1642018dd6c9..7e86086aa19c 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -115,20 +115,31 @@ static struct irq_work mce_irq_work; */ BLOCKING_NOTIFIER_HEAD(x86_mce_decoder_chain); +void mce_setup_global(struct mce *m) +{ + memset(m, 0, sizeof(struct mce)); + + m->cpuid = cpuid_eax(1); + m->cpuvendor = boot_cpu_data.x86_vendor; + m->mcgcap = __rdmsr(MSR_IA32_MCG_CAP); + /* need the internal __ version to avoid deadlocks */ + m->time = __ktime_get_real_seconds(); +} + +void mce_setup_per_cpu(struct mce *m) +{ + m->apicid = cpu_data(m->extcpu).topo.initial_apicid; + m->microcode = cpu_data(m->extcpu).microcode; + m->ppin = cpu_data(m->extcpu).ppin; + m->socketid = cpu_data(m->extcpu).topo.pkg_id; +} + /* Do initial initialization of a struct mce */ void mce_setup(struct mce *m) { - memset(m, 0, sizeof(struct mce)); + mce_setup_global(m); m->cpu = m->extcpu = smp_processor_id(); - /* need the internal __ version to avoid deadlocks */ - m->time = __ktime_get_real_seconds(); - m->cpuvendor = boot_cpu_data.x86_vendor; - m->cpuid = cpuid_eax(1); - m->socketid = cpu_data(m->extcpu).topo.pkg_id; - m->apicid = cpu_data(m->extcpu).topo.initial_apicid; - m->mcgcap = __rdmsr(MSR_IA32_MCG_CAP); - m->ppin = cpu_data(m->extcpu).ppin; - m->microcode = boot_cpu_data.microcode; + mce_setup_per_cpu(m); } DEFINE_PER_CPU(struct mce, injectm); -- 2.34.1