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([2402:7500:5d5:bc21:3420:fefa:20d4:2a2f]) by smtp.gmail.com with ESMTPSA id y12-20020a170902ed4c00b001cc256ce1besm4928265plb.138.2023.11.19.18.55.17 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 19 Nov 2023 18:55:20 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.7\)) Subject: Re: [PATCH 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation From: Jerry Shih In-Reply-To: <20231102054327.GH1498@sol.localdomain> Date: Mon, 20 Nov 2023 10:55:15 +0800 Cc: Paul Walmsley , palmer@dabbelt.com, Albert Ou , herbert@gondor.apana.org.au, davem@davemloft.net, andy.chiu@sifive.com, greentime.hu@sifive.com, conor.dooley@microchip.com, guoren@kernel.org, bjorn@rivosinc.com, heiko@sntech.de, ardb@kernel.org, phoebe.chen@sifive.com, hongrong.hsu@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org Content-Transfer-Encoding: 7bit Message-Id: <90E2B1B4-ACC1-4316-81CD-E919D3BD03BA@sifive.com> References: <20231025183644.8735-1-jerry.shih@sifive.com> <20231025183644.8735-13-jerry.shih@sifive.com> <20231102054327.GH1498@sol.localdomain> To: Eric Biggers X-Mailer: Apple Mail (2.3445.9.7) X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sun, 19 Nov 2023 18:55:35 -0800 (PST) On Nov 2, 2023, at 13:43, Eric Biggers wrote: > On Thu, Oct 26, 2023 at 02:36:44AM +0800, Jerry Shih wrote: >> +static struct skcipher_alg riscv64_chacha_alg_zvkb[] = { { >> + .base = { >> + .cra_name = "chacha20", >> + .cra_driver_name = "chacha20-riscv64-zvkb", >> + .cra_priority = 300, >> + .cra_blocksize = 1, >> + .cra_ctxsize = sizeof(struct chacha_ctx), >> + .cra_module = THIS_MODULE, >> + }, >> + .min_keysize = CHACHA_KEY_SIZE, >> + .max_keysize = CHACHA_KEY_SIZE, >> + .ivsize = CHACHA_IV_SIZE, >> + .chunksize = CHACHA_BLOCK_SIZE, >> + .walksize = CHACHA_BLOCK_SIZE * 4, >> + .setkey = chacha20_setkey, >> + .encrypt = chacha20_encrypt, >> + .decrypt = chacha20_encrypt, >> +} }; >> + >> +static inline bool check_chacha20_ext(void) >> +{ >> + return riscv_isa_extension_available(NULL, ZVKB) && >> + riscv_vector_vlen() >= 128; >> +} >> + >> +static int __init riscv64_chacha_mod_init(void) >> +{ >> + if (check_chacha20_ext()) >> + return crypto_register_skciphers( >> + riscv64_chacha_alg_zvkb, >> + ARRAY_SIZE(riscv64_chacha_alg_zvkb)); >> + >> + return -ENODEV; >> +} >> + >> +static void __exit riscv64_chacha_mod_fini(void) >> +{ >> + if (check_chacha20_ext()) >> + crypto_unregister_skciphers( >> + riscv64_chacha_alg_zvkb, >> + ARRAY_SIZE(riscv64_chacha_alg_zvkb)); >> +} > > When there's just one algorithm being registered/unregistered, > crypto_register_skcipher() and crypto_unregister_skcipher() can be used. Fixed. >> +# - RV64I >> +# - RISC-V Vector ('V') with VLEN >= 128 >> +# - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb') >> +# - RISC-V Zicclsm(Main memory supports misaligned loads/stores) > > How is the presence of the Zicclsm extension guaranteed? > > - Eric I have the addition extension parser for `Zicclsm` in the v2 patch set. -Jerry