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Mon, 20 Nov 2023 01:41:40 -0800 (PST) References: <20231117125919.1696980-1-jbrunet@baylibre.com> <20231117125919.1696980-3-jbrunet@baylibre.com> <170040994064.269288.960284011884896046.robh@kernel.org> <4608012c-059f-4d6a-914b-e85ad0c32ff0@linaro.org> User-agent: mu4e 1.10.7; emacs 29.1 From: Jerome Brunet To: neil.armstrong@linaro.org Cc: Rob Herring , Jerome Brunet , JunYi Zhao , devicetree@vger.kernel.org, Rob Herring , Conor Dooley , Kevin Hilman , Thierry Reding , linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, linux-amlogic@lists.infradead.org, Krzysztof Kozlowski Subject: Re: [PATCH v2 2/6] dt-bindings: pwm: amlogic: add new compatible for meson8 pwm type Date: Mon, 20 Nov 2023 10:18:49 +0100 In-reply-to: <4608012c-059f-4d6a-914b-e85ad0c32ff0@linaro.org> Message-ID: <1j5y1wg3sb.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Mon, 20 Nov 2023 01:41:58 -0800 (PST) On Mon 20 Nov 2023 at 09:27, Neil Armstrong wrote: > Hi Rob, > > On 19/11/2023 17:05, Rob Herring wrote: >> On Fri, 17 Nov 2023 13:59:12 +0100, Jerome Brunet wrote: >>> Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. >>> >>> The previous clock bindings for these SoCs described the driver and not the >>> HW itself. The clock provided was used to set the parent of the input clock >>> mux among the possible parents hard-coded in the driver. >>> >>> The new bindings allows to describe the actual clock inputs of the PWM in >>> DT, like most bindings do, instead of relying of hard-coded data. >>> >>> The new bindings make the old one deprecated. >>> >>> There is enough experience on this HW to know that the PWM is exactly the >>> same all the supported SoCs. There is no need for a per-SoC compatible. >>> >>> Signed-off-by: Jerome Brunet >>> --- >>> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 36 +++++++++++++++++-- >>> 1 file changed, 34 insertions(+), 2 deletions(-) >>> >> Reviewed-by: Rob Herring >> > > I'm puzzled, isn't it recommended to have a per-soc compatible now ? I have specifically addressed this matter in the description, haven't I ? What good would it do in this case ? Plus the definition of a SoC is very vague. One could argue that the content of the list bellow are vaguely defined families. Should we add meson8b, gxl, gxm, sm1 ? ... or even the actual SoC reference ? This list gets huge for no reason. We know all existing PWM of this type are the same. We have been using them for years. It is not a new support we know nothing about. > > I thought something like: > - items: > - enum: > - amlogic,gxbb-pwm > - amlogic,axg-pwm > - amlogic,g12a-pwm > - const: amlogic,pwm-v1 I'm not sure I understand what you are suggesting here. Adding a "amlogic,pwm-v1" for the obsolete compatible ? No amlogic DT has that and I'm working to remove this type, so I don't get the point. > > should be preferred instead of a single amlogic,meson8-pwm-v2 ? This is named after the first SoC supporting the type. Naming it amlogic,pwm-v2 would feel weird with the s4 coming after. Plus the doc specifically advise against this type of names. > > Neil