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Message-ID: <5a98975e-d11c-43b8-ad95-1a2633733a19@quicinc.com>
Date:   Tue, 21 Nov 2023 08:40:54 +0800
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Subject: Re: [PATCH 07/16] arm64: dts: qcom: sm8550-aim300: add PCIe0
To:     Neil Armstrong <neil.armstrong@linaro.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        <agross@kernel.org>, <andersson@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <tglx@linutronix.de>
CC:     <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <kernel@quicinc.com>
References: <20231117101817.4401-1-quic_tengfan@quicinc.com>
 <20231117101817.4401-8-quic_tengfan@quicinc.com>
 <37a3a407-07e7-49d8-bbce-b1dac8cfcf5a@linaro.org>
 <247f4654-ec65-4857-8b35-1a79088e8b87@linaro.org>
 <1ae2da80-77e8-487a-a94d-b329e6f48360@linaro.org>
 <26df42ac-edb0-ac72-d5cb-4a4ae6819736@linaro.org>
From:   Tengfei Fan <quic_tengfan@quicinc.com>
In-Reply-To: <26df42ac-edb0-ac72-d5cb-4a4ae6819736@linaro.org>
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在 11/20/2023 1:59 AM, Neil Armstrong 写道:
> Le 18/11/2023 à 01:08, Konrad Dybcio a écrit :
>> On 17.11.2023 11:41, neil.armstrong@linaro.org wrote:
>>> On 17/11/2023 11:29, Dmitry Baryshkov wrote:
>>>> On 17/11/2023 12:18, Tengfei Fan wrote:
>>>>> Add PCIe0 nodes used with WCN7851 device.  The PCIe1 is not connected,
>>>>> thus skip pcie_1_phy_aux_clk input clock to GCC.
>>>>>
>>>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/sm8550-aim300.dts | 32 
>>>>> ++++++++++++++++++++++
>>>>>    1 file changed, 32 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts 
>>>>> b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
>>>>> index 202b979da8ca..3aca0a433a00 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
>>>>> @@ -393,6 +393,38 @@
>>>>>        };
>>>>>    };
>>>>> +&gcc {
>>>>> +    clocks = <&bi_tcxo_div2>, <&sleep_clk>,
>>>>> +         <&pcie0_phy>,
>>>>> +         <&pcie1_phy>,
>>>>> +         <0>,
>>>>> +         <&ufs_mem_phy 0>,
>>>>> +         <&ufs_mem_phy 1>,
>>>>> +         <&ufs_mem_phy 2>,
>>>>> +         <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
>>>>> +};
>>>>
>>>> NAK, this should go to sm8550.dtsi unless there is a good reason.
>>>
>>> Actually this is how QRD8550 was designed, so it's fine to mimic.
>> Does CCF not handle this gracefully?
> 
> CCF handles this very gracefully and it's a perfectly valid DT in regard
> to the bindings...
> 
> neil
> 
>>
>> Konrad
> 
Thanks Konrad and Neil comments and disscusion this patch, I also will 
confirm this with internal team.

-- 
Thx and BRs,
Tengfei Fan