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([2605:a601:adae:4500:3d43:c8e2:1496:e620]) by smtp.gmail.com with ESMTPSA id fj34-20020a056638636200b004290fd3a68dsm2835154jab.1.2023.11.21.14.48.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Nov 2023 14:48:09 -0800 (PST) Message-ID: Date: Tue, 21 Nov 2023 16:48:08 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 5/5] RISC-V: Enable SBI based earlycon support Content-Language: en-US To: Anup Patel Cc: Conor Dooley , Andrew Jones , linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Greg Kroah-Hartman , Jiri Slaby References: <20231118033859.726692-1-apatel@ventanamicro.com> <20231118033859.726692-6-apatel@ventanamicro.com> From: Samuel Holland In-Reply-To: <20231118033859.726692-6-apatel@ventanamicro.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 21 Nov 2023 14:48:17 -0800 (PST) Hi Anup, On 2023-11-17 9:38 PM, Anup Patel wrote: > Let us enable SBI based earlycon support in defconfigs for both RV32 > and RV64 so that "earlycon=sbi" can be used again. > > Signed-off-by: Anup Patel > Reviewed-by: Andrew Jones > --- > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index 905881282a7c..eaf34e871e30 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y > CONFIG_SERIAL_8250_DW=y > CONFIG_SERIAL_OF_PLATFORM=y > CONFIG_SERIAL_SH_SCI=y > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y > CONFIG_VIRTIO_CONSOLE=y > CONFIG_HW_RANDOM=y > CONFIG_HW_RANDOM_VIRTIO=y > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 89b601e253a6..5721af39afd1 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig This file isn't used anymore since 72f045d19f25 ("riscv: Fixup difference with defconfig"), so there's no need to update it. I'll send a patch deleting it. Regards, Samuel > @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y > CONFIG_SERIAL_8250=y > CONFIG_SERIAL_8250_CONSOLE=y > CONFIG_SERIAL_OF_PLATFORM=y > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y > CONFIG_VIRTIO_CONSOLE=y > CONFIG_HW_RANDOM=y > CONFIG_HW_RANDOM_VIRTIO=y