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[2620:137:e000::3:5]) by mx.google.com with ESMTPS id x4-20020a631704000000b005bdf5961588si12791630pgl.19.2023.11.22.04.25.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Nov 2023 04:25:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fygggFJ6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id A1FBD80D6AC9; Wed, 22 Nov 2023 04:24:57 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344032AbjKVMYh (ORCPT + 99 others); Wed, 22 Nov 2023 07:24:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343951AbjKVMYg (ORCPT ); Wed, 22 Nov 2023 07:24:36 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD6D398 for ; Wed, 22 Nov 2023 04:24:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700655872; x=1732191872; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=SX370jZj/iiF375wRpaiuBBt7qWPi41IvDXuLfaDWac=; b=fygggFJ6G46mx2xhChMDAw390As1r/sqKAxRUSy+n22AiXJCRPxC59dh LcRns773Oxnkxn0H/BJ574EmnWLZTPNjG6kzD3an5eQdFPTvUufjarbF5 jnG+5nqxUC9wvN7w6Bzsj5Leh4mdkWiWpbuhfnkNAfMtdB6u5tbdG30xN 51dsIa9ChjU5nuFrD5xXl4jaw70GSwb2l3nAXPISQxkZUfn+3LKu5u7/0 W553UNrqdvsDy4GMtsnS8MYpxoqNP+YhEiWqB6AD/EG679Z3X4Ik1eWWN XBNFh71Sh/ZqfsbLAAifKstfInMpErz+FZH9n29w3RVl8fpzem3JF02i9 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10901"; a="5184348" X-IronPort-AV: E=Sophos;i="6.04,218,1695711600"; d="scan'208";a="5184348" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 04:24:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10901"; a="1014216736" X-IronPort-AV: E=Sophos;i="6.04,218,1695711600"; d="scan'208";a="1014216736" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 04:24:28 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1r5mHJ-0000000G5Qe-04tS; Wed, 22 Nov 2023 14:24:25 +0200 Date: Wed, 22 Nov 2023 14:24:24 +0200 From: Andy Shevchenko To: Nikita Shubin Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Arnd Bergmann , Linus Walleij , Neil Armstrong , Daniel Golle , Jean Delvare , Christophe Kerello , Chris Packham , Johan Jonker , linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Alexander Sverdlin Subject: Re: [PATCH v5 19/39] mtd: rawnand: add support for ts72xx Message-ID: References: <20231122-ep93xx-v5-0-d59a76d5df29@maquefel.me> <20231122-ep93xx-v5-19-d59a76d5df29@maquefel.me> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231122-ep93xx-v5-19-d59a76d5df29@maquefel.me> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 22 Nov 2023 04:24:58 -0800 (PST) On Wed, Nov 22, 2023 at 11:59:57AM +0300, Nikita Shubin wrote: > Technologic Systems has it's own nand controller implementation in CPLD. ... > +static int ts72xx_nand_attach_chip(struct nand_chip *chip) > +{ > + switch (chip->ecc.engine_type) { > + case NAND_ECC_ENGINE_TYPE_SOFT: > + if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) > + chip->ecc.algo = NAND_ECC_ALGO_HAMMING; > + chip->ecc.algo = NAND_ECC_ALGO_HAMMING; > + break; > + case NAND_ECC_ENGINE_TYPE_ON_HOST: > + return -EINVAL; > + default: > + break; > + } > + > + return 0; Move this to default. > +} ... > + for (i = 0; i < instr->ctx.addr.naddrs; i++) > + iowrite8(instr->ctx.addr.addrs[i], data->base); iowrite8_rep() ? > + case NAND_OP_DATA_IN_INSTR: > + ioread8_rep(data->base, instr->ctx.data.buf.in, instr->ctx.data.len); Hehe, you are even using it... ... > + if (instr->delay_ns) What will happen if you drop this check? > + ndelay(instr->delay_ns); ... > + int ret; > + > + ret = mtd_device_unregister(nand_to_mtd(chip)); > + WARN_ON(ret); Is this a requirement by MTD to have return value being checked? -- With Best Regards, Andy Shevchenko