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Date:   Thu, 23 Nov 2023 00:03:56 +0300
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Subject: Re: [PATCH v2 1/1] drm/msm/adreno: Add support for SM7150 SoC machine
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To:     Konrad Dybcio <konrad.dybcio@linaro.org>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        robdclark@gmail.com, quic_abhinavk@quicinc.com, sean@poorly.run,
        marijn.suijten@somainline.org, airlied@gmail.com, daniel@ffwll.ch,
        johan+linaro@kernel.org, andersson@kernel.org,
        Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc:     linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
        freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
References: <20230926174243.161422-1-danila@jiaxyga.com>
 <20230926174243.161422-2-danila@jiaxyga.com>
 <42a1d0ab-4e8d-461d-bb2c-977a793e52b2@linaro.org>
 <1695755445.902336096@f165.i.mail.ru>
 <84e63b82-4fef-416b-8dbe-3838ad788824@linaro.org>
 <c684d0a7-3336-48e3-9d2b-5c92f9132550@linaro.org>
 <f76637f9-8242-4258-932e-b879145a5cfd@linaro.org>
From:   Danila Tikhonov <danila@jiaxyga.com>
In-Reply-To: <f76637f9-8242-4258-932e-b879145a5cfd@linaro.org>
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Precedence: bulk

sc7180/sm7125 (atoll) expects speedbins from atoll.dtsi:
And has a parameter: /delete-property/ qcom,gpu-speed-bin;
107 for 504Mhz max freq, pwrlevel 4
130 for 610Mhz max freq, pwrlevel 3
159 for 750Mhz max freq, pwrlevel 5
169 for 800Mhz max freq, pwrlevel 2
174 for 825Mhz max freq, pwrlevel 1 (Downstream says 172, but thats 
probably typo)
For rest of the speed bins, speed-bin value is calulated as
FMAX/4.8MHz + 2 round up to zero decimal places.

sm7150 (sdmmagpie) expects speedbins from sdmmagpie-gpu.dtsi:
128 for 610Mhz max freq, pwrlevel 3
146 for 700Mhz max freq, pwrlevel 2
167 for 800Mhz max freq, pwrlevel 4
172 for 504Mhz max freq, pwrlevel 1
For rest of the speed bins, speed-bin value is calulated as
FMAX/4.8 MHz round up to zero decimal places.

Creating a new entry does not make much sense.
I can suggest expanding the standard entry:

.speedbins = ADRENO_SPEEDBINS(
     { 0, 0 },
     /* sc7180/sm7125 */
     { 107, 3 },
     { 130, 4 },
     { 159, 5 },
     { 168, 1 }, has already
     { 174, 2 }, has already
     /* sm7150 */
     { 128, 1 },
     { 146, 2 },
     { 167, 3 },
     { 172, 4 }, ),

All the best,
Danila

On 11/22/23 23:28, Konrad Dybcio wrote:
>
>
> On 10/16/23 16:32, Dmitry Baryshkov wrote:
>> On 26/09/2023 23:03, Konrad Dybcio wrote:
>>> On 26.09.2023 21:10, Danila Tikhonov wrote:
>>>>
>>>> I think you mean by name downstream dt - sdmmagpie-gpu.dtsi
>>>>
>>>> You can see the forked version of the mainline here:
>>>> https://github.com/sm7150-mainline/linux/blob/next/arch/arm64/boot/dts/qcom/sm7150.dtsi 
>>>>
>>>>
>>>> All fdt that we got here, if it is useful for you:
>>>> https://github.com/sm7150-mainline/downstream-fdt
>>>>
>>>> Best wishes, Danila
>>> Taking a look at downstream, atoll.dtsi (SC7180) includes
>>> sdmmagpie-gpu.dtsi.
>>>
>>> Bottom line is, they share the speed bins, so it should be
>>> fine to just extend the existing entry.
>>
>> But then atoll.dtsi rewrites speed bins and pwrlevel bins. So they 
>> are not shared.
> +Akhil
>
> could you please check internally?
>
> Konrad