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Message-ID: <6f7ee679-38be-abfd-a71c-d33e15c79c7d@quicinc.com>
Date:   Thu, 23 Nov 2023 11:50:59 +0530
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Subject: Re: [PATCH V4 2/4] clk: qcom: branch: Add mem ops support for branch2
 clocks
To:     Konrad Dybcio <konrad.dybcio@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>
CC:     Taniya Das <quic_tdas@quicinc.com>,
        <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <netdev@vger.kernel.org>, Ajit Pandey <quic_ajipan@quicinc.com>,
        Jagadeesh Kona <quic_jkona@quicinc.com>
References: <20231117095558.3313877-1-quic_imrashai@quicinc.com>
 <20231117095558.3313877-3-quic_imrashai@quicinc.com>
 <90885d90-2e25-404b-b3a3-13d134801146@linaro.org>
Content-Language: en-US
From:   Imran Shaik <quic_imrashai@quicinc.com>
In-Reply-To: <90885d90-2e25-404b-b3a3-13d134801146@linaro.org>
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Precedence: bulk


On 11/23/2023 1:39 AM, Konrad Dybcio wrote:
> 
> 
> On 11/17/23 10:55, Imran Shaik wrote:
>> From: Taniya Das <quic_tdas@quicinc.com>
>>
>> Add the support for mem ops implementation to handle the sequence of
>> enable/disable of the memories in ethernet PHY, prior to enable/disable
>> of the respective clocks, which helps retain the respecive block's
>> register contents.
>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
>> ---
>>   drivers/clk/qcom/clk-branch.c | 39 +++++++++++++++++++++++++++++++++++
>>   drivers/clk/qcom/clk-branch.h | 21 +++++++++++++++++++
>>   2 files changed, 60 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/clk-branch.c 
>> b/drivers/clk/qcom/clk-branch.c
>> index fc4735f74f0f..61bdd2147bed 100644
>> --- a/drivers/clk/qcom/clk-branch.c
>> +++ b/drivers/clk/qcom/clk-branch.c
>> @@ -1,6 +1,7 @@
>>   // SPDX-License-Identifier: GPL-2.0
>>   /*
>>    * Copyright (c) 2013, The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights 
>> reserved.
>>    */
>>   #include <linux/kernel.h>
>> @@ -134,6 +135,44 @@ static void clk_branch2_disable(struct clk_hw *hw)
>>       clk_branch_toggle(hw, false, clk_branch2_check_halt);
>>   }
>> +static int clk_branch2_mem_enable(struct clk_hw *hw)
>> +{
>> +    struct clk_mem_branch *mem_br = to_clk_mem_branch(hw);
>> +    struct clk_branch branch = mem_br->branch;
>> +    const char *name = clk_hw_get_name(&branch.clkr.hw);
> Bit of a microoptimization, but adding this implicitly in the WARN
> would only execute clk_hw_get_name when necessary
> 

Sure, will remove this line and use the clk_hw_get_name implicitly in WARN.

>> +    u32 val;
>> +    int ret;
>> +
>> +    regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg,
>> +            mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask);
> It's quite a nit from me, but it would be nice to have the next line 
> aligned
> with the opening brace (with a tab size of 8)
> 
> Konrad

Sure, will align the lines and post another series.

Thanks,
Imran