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Thu, 23 Nov 2023 07:13:17 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AN7DGqs010416 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 Nov 2023 07:13:16 GMT Received: from [10.253.15.194] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 22 Nov 2023 23:13:13 -0800 Message-ID: <9c95987a-8147-4cfa-917a-a609967706f4@quicinc.com> Date: Thu, 23 Nov 2023 15:13:09 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 00/11] Enable HS-G5 support on SM8550 To: Andrew Halaney CC: , , , , , , , , Matthias Brugger , AngeloGioacchino Del Regno , "open list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" References: <1700637042-11104-1-git-send-email-quic_cang@quicinc.com> Content-Language: en-US From: Can Guo In-Reply-To: Content-Type: text/plain; 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Wed, 22 Nov 2023 23:14:11 -0800 (PST) On 11/23/2023 12:17 AM, Andrew Halaney wrote: > On Tue, Nov 21, 2023 at 11:10:31PM -0800, Can Guo wrote: >> This series enables HS-G5 support on SM8550. >> >> This series is rebased on below changes from Mani - >> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/ >> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/ >> >> This series is tested on below HW combinations - >> SM8550 MTP + UFS4.0 >> SM8550 QRD + UFS3.1 >> SM8450 MTP + UFS3.1 (for regression test) >> SM8350 MTP + UFS3.1 (for regression test) >> >> Note that during reboot test on above platforms, I occasinally hit PA (PHY) >> error during the 2nd init, this is not related with this series. A fix for >> this is mentioned in below patchwork - >> >> https://patchwork.kernel.org/project/linux-scsi/patch/1698145815-17396-1-git-send-email-quic_ziqichen@quicinc.com/ >> >> Also note that on platforms, which have two sets of UFS PHY settings are >> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are >> basically programming different values to different registers, mixing the >> two sets and/or overwriting one set with another set is definitely not >> blessed by UFS PHY designers. For SM8550, this series will make sure we >> honor the rule. However, for old targets Mani and I will fix them in >> another series in future. >> >> v2 -> v3: >> 1. Addressed comments from Andrew, Mani and Bart in patch #1 >> 2. Added patch #2 as per request from Andrew and Mani >> 3. Added patch #4 to fix a common issue on old targets, it is not necessary >> for this series, but put in this series only because it would be easier >> to maintain and no need to rebase >> 4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c >> >> v1 -> v2: >> 1. Removed 2 changes which were exposing power info in sysfs >> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h >> 3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani >> 4. Adjusted the logic of UFS device version detection according to comments from Mani: >> 4.1 For HW version < 0x5, go through dual init >> 4.2 For HW version >= 0x5 >> a. If UFS device version is populated, one init is required >> b. If UFS device version is not populated, go through dual init > > The cover letter didn't include linux-arm-msm@vger.kernel.org, which > made me have to go searching for this on lore to see what had changed > in the rest of the series I received as a member of that mailing list. > Sorry for the inconvenience. > Going forward please try and include that mailing list! Sure, will do. Thanks, Can Guo. > >> >> Bao D. Nguyen (1): >> scsi: ufs: ufs-qcom: Add support for UFS device version detection >> >> Can Guo (10): >> scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params >> scsi: ufs: ufs-qcom: No need to set hs_rate after >> ufshcd_init_host_param() >> scsi: ufs: ufs-qcom: Setup host power mode during init >> scsi: ufs: ufs-qcom: Limit negotiated gear to selected PHY gear >> scsi: ufs: ufs-qcom: Allow the first init start with the maximum >> supported gear >> scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5 >> scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 5 >> and newer >> phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings >> phy: qualcomm: phy-qcom-qmp-ufs: Use tbls_hs_max instead of tbls_hs_g4 >> phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for >> SM8550 >> >> drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h | 2 + >> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h | 2 + >> .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 12 ++ >> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 171 ++++++++++++++++----- >> drivers/ufs/host/ufs-exynos.c | 7 +- >> drivers/ufs/host/ufs-hisi.c | 11 +- >> drivers/ufs/host/ufs-mediatek.c | 12 +- >> drivers/ufs/host/ufs-qcom.c | 92 ++++++++--- >> drivers/ufs/host/ufs-qcom.h | 5 +- >> drivers/ufs/host/ufshcd-pltfrm.c | 69 ++++----- >> drivers/ufs/host/ufshcd-pltfrm.h | 10 +- >> 11 files changed, 275 insertions(+), 118 deletions(-) >> >> -- >> 2.7.4 >> >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >