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Message-ID: <a717ac7d-a112-4259-b28f-17a79069c766@quicinc.com>
Date:   Thu, 23 Nov 2023 14:42:57 +0530
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Subject: Re: [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for
 SDM670/SDM845/SM6350
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>
CC:     <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <quic_ppratap@quicinc.com>,
        <quic_jackp@quicinc.com>, <quic_wcheng@quicinc.com>
References: <20231122191452.3183-1-quic_kriskura@quicinc.com>
 <640523aa-6b14-417c-8a62-e02d17a26ce7@linaro.org>
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From:   Krishna Kurapati PSSNV <quic_kriskura@quicinc.com>
In-Reply-To: <640523aa-6b14-417c-8a62-e02d17a26ce7@linaro.org>
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On 11/23/2023 2:21 PM, Krzysztof Kozlowski wrote:
> On 22/11/2023 20:14, Krishna Kurapati wrote:
>> For sm6350/sdm670/sdm845, although they are qusb2 phy targets, dp/dm
>> interrupts are used for wakeup instead of qusb2_phy irq. These targets
>> were part of a generation that were the last ones to implement QUSB2 PHY
>> and the design incorporated dedicated DP/DM interrupts which eventually
>> carried forward to the newer femto based targets.
>>
>> Add the missing pwr_event irq for these targets.
>>
>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sdm670.dtsi |  5 ++++-
>>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++--
>>   arch/arm64/boot/dts/qcom/sm6350.dtsi |  7 +++++--
>>   3 files changed, 17 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> index 6d9843d05cb3..b8888f71b1d6 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> @@ -1296,10 +1296,13 @@ usb_1: usb@a6f8800 {
>>   			assigned-clock-rates = <19200000>, <150000000>;
>>   
>>   			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
>>   				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
>>   				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
>>   				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
>> -			interrupt-names = "hs_phy_irq", "ss_phy_irq",
>> +			interrupt-names = "hs_phy_irq",
>> +					  "pwr_event",
>> +					  "ss_phy_irq",
>>   					  "dm_hs_phy_irq", "dp_hs_phy_irq";
> 
> New entries should be added usually to the end of the list. Commit msg
> does not explain this to me why new entry is in the middle of the list.
> 

Actually there is no proper rationale from my end why I added them in 
middle. The only reason I did it was that because in many places the 
interrupt was mis-named or missing. So when making changes, I just put 
the missing interrupt next to hs_phy_irq. But my reasoning doesn't make 
much sense. Sorry for that.

Thanks for the review. Will put the extra interrupt at the end.

Regards,
Krishna,