Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7;
Message-ID: <b84db4ac-eaa9-4fc8-9ce6-00da03ab711f@intel.com>
Date:   Thu, 23 Nov 2023 11:53:55 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [net PATCH 3/5] octeontx2-af: Fix mcs stats register address
Content-Language: en-US
To:     Geetha sowjanya <gakula@marvell.com>, <netdev@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
CC:     <kuba@kernel.org>, <davem@davemloft.net>, <pabeni@redhat.com>,
        <edumazet@google.com>, <sgoutham@marvell.com>,
        <sbhatta@marvell.com>, <hkelam@marvell.com>
References: <20231123055941.19430-1-gakula@marvell.com>
 <20231123055941.19430-4-gakula@marvell.com>
From:   Wojciech Drewek <wojciech.drewek@intel.com>
In-Reply-To: <20231123055941.19430-4-gakula@marvell.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: 7bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?cHdIZ1F1UFFmMFQ2ekJXdk91cVlvUytoajFEZTYweE1Ma0FYOGxTUjc5bkRp?=
 =?utf-8?B?b2h2dFcyYnJXdEkxbFN4bm1GeTYvVHp2VE1Gc252TXN5RVlVSGJOd0lndXlI?=
 =?utf-8?B?YmRoM2JDa3dIN25QTWlCbzhtVXJ3Q0hvVGFRcGdaWWc4ODRIMlpTYUFWOFYy?=
 =?utf-8?B?UU5sT09IOXQ2NDVkeHlTaDA0MFBGK0F4SngxQXdmUHVob0ozWDNJWVB5RGdH?=
 =?utf-8?B?N0RzN1o5N05xdUU4YTBMeXdQNW5FVmtHSmxlbjhyVHEzQW92MUplWU5PZm42?=
 =?utf-8?B?NGZLY09oQnltQ0tpRUhnVEZWU2hobVJwZHJSL0NyaGhVWExBMk1RWGNldXZM?=
 =?utf-8?B?aXpjTExSNzk2RmpvUHJKOERGdEVLU01KVXJuNUdESng2Q1RmWE5zcjZWbnJu?=
 =?utf-8?B?RmQ1WlROd0o2b1RrWE1heGRvdE1tV0loWVFvMTEwalA2Ukl0RTJkTGdNUXEv?=
 =?utf-8?B?SmpocGF0dGNCZDU5Yk5lMlFCUmRDa3Z2OWcxc2VWeHlnT0VJd2NqWWRHbWRF?=
 =?utf-8?B?WXRaSVd4aTJhc3RXYTgveG5rZ2pWZUZrVWV1MnllWjQvOWtjTDllR2Vnc3JO?=
 =?utf-8?B?elM4U3VZNm1MRnEwNDMxQjg4ZDhZbmpEa09YRktoUXZYeHhycDRaZHVCYi9r?=
 =?utf-8?B?M1F3Slc1aVlzNjZOem5zOGdDa1FHVzdtRkh6NVY1OGJkTXBneDFmZ2MvOVdS?=
 =?utf-8?B?ZHdsMC9qQm10T3YrUkVMdHFvYVBJZkF5dWxVdmRwSHJ6eGNzVlhyNzZtWG9C?=
 =?utf-8?B?ZFdGMndWcWJJZ3BLbVVhYWdYekVjMGMwc2ZYUElaUHdjcGw3QWpIYmVFbW9O?=
 =?utf-8?B?VGN0aVIvSXdKL0pQS0Z1ZnZuVnc2WkZuWnhPWFlsRklGVUhnT1hpenpTOEx3?=
 =?utf-8?B?QTJOTFdRRU8zcE41OGs1Q1hBSHRnZklFSmFtOFQ5a2pISjNrR1V2aDBUTEFs?=
 =?utf-8?B?alJFS1EvN1Y2Z2pIRWdDYWgxVkczeEV1OFB6VmZxb0pKQkVPVSs3QjNJUC9p?=
 =?utf-8?B?NERWVlFKTlZFdGhZT0lNeTVqck1yY25CK1RJeEdoMnRaVHJpNUh1VlcyTDVM?=
 =?utf-8?B?bG5uTDJDcnVXOGIyRllvOCs5Q3BCQ1VIOG9iWlhnOFl4cmFBQmR0RmhWTjIv?=
 =?utf-8?B?NS80VEN6WEFEQ2tkaU40L3Nqd0RZbjlyWmUva3VHbEp6c1JjRWpKdGQ0V1Bx?=
 =?utf-8?B?ZGF0NS9rZGNGRmt5Wmc4bzNJVWJ2WFFEZS96SkR0SkI3MVAxL2E5dEg1VFIr?=
 =?utf-8?B?NStBNnNKdTRVL3hVaGFtVzJ4VVVLbThLbU9hRWJpM2xpYmFyemZ4TzEvN0ow?=
 =?utf-8?B?WGZjdGxmTVlpMkZMYjFjdUVITm5ER1owTjNDQ2ZDUVdoU1RqNmpONTVqR1Vh?=
 =?utf-8?B?aUk3K0N0akd0M0pWUWpyWXJxK2swNWpYdVRmbVRWL0Vac0RvN1Jhd3c0aDgw?=
 =?utf-8?B?bW5XcFlwRUNpcGh5Z0VPZVNxS0U5QUFNRmhPWWZ5SWdyYzNvbjBRR0NGNjVM?=
 =?utf-8?B?Vk05YnNLbEFNbHd4aGVyZEZxMElVbkZKbjd5TVg0ZDgrUEY4dGt4MTVrYm1P?=
 =?utf-8?B?NHZjQzNlQkY5dE5OUERaVlB4am5rNFN5UjJzNFB4bFdnTmNHSUFnVHdUbmsy?=
 =?utf-8?B?dFFjTGllSktsS3AzYTBXL1htelRXNWtZNVg3M1Bmd1NEUXhDWUdrc3ZsNTcw?=
 =?utf-8?B?dzY2QXh2TEZsYkFzQUprTkdLU1M4RlFTblkyRnc5SndyMitvMTdCMStlZndW?=
 =?utf-8?B?SWZ2dzF4RzlkcXhaQkpGakhycnpvcTFZeU5FNURIYnhOL29GeDhFMUE2MGZ3?=
 =?utf-8?B?ZUppbWE2SFJUNFB4UmRsT2pmNEsrb3hGb1FRdmFWS3FOZERJZmx6NmJvODhV?=
 =?utf-8?B?eVl3NDJFZW9ienh3eFhGSXovR0FTNkl4V056UzZVbFE5WThBWEhJTWIyd1dH?=
 =?utf-8?B?a0RCTkpmMUFaNGN4WlNUditiaFNaUEliaTJlRFdlRmZVeTNPQzVzMTBsTjAv?=
 =?utf-8?B?VWlGOVo0UlFFczQ2UTBqWVpIR3hYT2VVT3NteTlvZmtjaDVzYU02T0xHNVRa?=
 =?utf-8?B?VzQ3bVhEYmNjVnlQaHVRUVhMNkdHdUJTQ1ZCM21wcGxENEZraHE2Z1FpcUNM?=
 =?utf-8?B?KytvV29IdmFQT2E2c1h2NjhRalNzWHBkejA0a2J3UTJacnVlWmI3SkQvUHlH?=
 =?utf-8?B?Tnc9PQ==?=
X-MS-Exchange-CrossTenant-Network-Message-Id: 8ad8f5ba-9283-4a3d-c227-08dbec128045
X-MS-Exchange-CrossTenant-AuthSource: MW4PR11MB5776.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Nov 2023 10:54:01.1178
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: Fx2cZL0b4CQAa4Mwvixmq0WIoX0HawF3b+KZN3eJv3GY6aGsUl69Ne4/N6cAwFctFoQhXVXPxA8VHGeFNOG8VMPaCGwiaKuEMMeSrez08DQ=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR11MB5019
X-OriginatorOrg: intel.com
X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,
        SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED
        autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 23 Nov 2023 02:54:14 -0800 (PST)


On 23.11.2023 06:59, Geetha sowjanya wrote:
> This patch adds the miss mcs stats register
> for mcs supported platforms.
> 
> Fixes: 9312150af8da ("octeontx2-af: cn10k: mcs: Support for stats collection")
> Signed-off-by: Geetha sowjanya <gakula@marvell.com>
> ---

Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>

>  .../net/ethernet/marvell/octeontx2/af/mcs.c   |  4 +--
>  .../ethernet/marvell/octeontx2/af/mcs_reg.h   | 31 ++++++++++++++++---
>  2 files changed, 29 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> index d6effbe46208..d4a4e4c837ec 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> @@ -117,7 +117,7 @@ void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id
>  	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);
>  	stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);
>  
> -	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);
> +	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(id);
>  	stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);
>  
>  	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);
> @@ -215,7 +215,7 @@ void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats,
>  		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);
>  		stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);
>  
> -		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);
> +		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(id);
>  		stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);
>  
>  		if (mcs->hw->mcs_blks > 1) {
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> index f3ab01fc363c..f4c6de89002c 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> @@ -810,14 +810,37 @@
>  		offset = 0x9d8ull;			\
>  	offset; })
>  
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({	\
> +	u64 offset;					\
> +							\
> +	offset = 0xee80ull;				\
> +	if (mcs->hw->mcs_blks > 1)			\
> +		offset = 0xe818ull;			\
> +	offset += (a) * 0x8ull;				\
> +	offset; })
> +
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({	\
> +	u64 offset;					\
> +							\
> +	offset = 0xa680ull;				\
> +	if (mcs->hw->mcs_blks > 1)			\
> +		offset = 0xd018ull;			\
> +	offset += (a) * 0x8ull;				\
> +	offset; })
> +
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a)	({	\
> +	u64 offset;						\
> +								\
> +	offset = 0xf680ull;					\
> +	if (mcs->hw->mcs_blks > 1)				\
> +		offset = 0xe018ull;				\
> +	offset += (a) * 0x8ull;					\
> +	offset; })
> +
>  #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a)	(0xe680ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a)	(0xde80ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(a)	(0xa680ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a)	(0xd218 + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a)	(0xd018ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(a)	(0xee80ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a)		(0xb680ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) (0xf680ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a)	(0x12680ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull)
>  #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a)	(0x13680ull + (a) * 0x8ull)