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Thu, 23 Nov 2023 11:02:27 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3ANB2Qnt028025 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 Nov 2023 11:02:26 GMT Received: from [10.253.33.181] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 23 Nov 2023 03:02:21 -0800 Message-ID: <82992471-cb5c-4351-9c19-31347f937940@quicinc.com> Date: Thu, 23 Nov 2023 19:02:19 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/9] net: mdio: ipq4019: Enable the clocks for ipq5332 platform To: Andrew Lunn CC: Konrad Dybcio , , , , , , , , , , , , , , , , , References: <20231115032515.4249-1-quic_luoj@quicinc.com> <20231115032515.4249-3-quic_luoj@quicinc.com> <10dc0fff-fc00-4c1f-97cf-30c5e5e8f983@linaro.org> <9acace07-d758-4d5d-8321-de75ee53355d@quicinc.com> <187a148d-39af-4000-825d-63ca3e3a23b1@lunn.ch> Content-Language: en-US From: Jie Luo In-Reply-To: <187a148d-39af-4000-825d-63ca3e3a23b1@lunn.ch> Content-Type: text/plain; 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Thu, 23 Nov 2023 03:02:49 -0800 (PST) On 11/21/2023 10:04 PM, Andrew Lunn wrote: > On Tue, Nov 21, 2023 at 06:28:54PM +0800, Jie Luo wrote: >> >> >> On 11/20/2023 10:22 PM, Konrad Dybcio wrote: >>> On 15.11.2023 04:25, Luo Jie wrote: >>>> For the platform ipq5332, the related GCC clocks need to be enabled >>>> to make the GPIO reset of the MDIO slave devices taking effect. >>>> >>>> Signed-off-by: Luo Jie >>> [...] >>> >>>> static int ipq4019_mdio_wait_busy(struct mii_bus *bus) >>>> @@ -212,6 +231,38 @@ static int ipq_mdio_reset(struct mii_bus *bus) >>>> u32 val; >>>> int ret; >>>> + /* For the platform ipq5332, there are two uniphy available to connect the >>>> + * ethernet devices, the uniphy gcc clock should be enabled for resetting >>>> + * the connected device such as qca8386 switch or qca8081 PHY effectively. >>>> + */ >>>> + if (of_device_is_compatible(bus->parent->of_node, "qcom,ipq5332-mdio")) { >>> Would that not also be taken care of in the phy driver? >>> >>> Konrad >> >> Hi Konrad, >> These clocks are the SOC clocks that is not related to the PHY type. >> no matter what kind of PHY is connected, we also need to configure >> these clocks. > > Hi Jie > > You can avoid lots of these questions by making your commit message > better. Assume the reader does not know the clock tree for this > device. With a bit of experience, you can guess what reviewers are > going to ask, and answer those questions in the commit message. > > Andrew Hi Andrew, Got it, will take more attention on the commit message to make the code clearly in future patches, thanks for the suggestion.