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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id jc13-20020a056a006c8d00b006cb997a7799si8137721pfb.67.2023.11.27.03.28.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 03:28:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=fail (test mode) header.i=@ideasonboard.com header.s=mail header.b=vKod8A2M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 91DA6805ECDB; Mon, 27 Nov 2023 03:28:04 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233213AbjK0L1x (ORCPT + 99 others); Mon, 27 Nov 2023 06:27:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233252AbjK0L1t (ORCPT ); Mon, 27 Nov 2023 06:27:49 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A66718F; Mon, 27 Nov 2023 03:27:48 -0800 (PST) Received: from pendragon.ideasonboard.com (aztw-30-b2-v4wan-166917-cust845.vm26.cable.virginm.net [82.37.23.78]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7E1C92B6; Mon, 27 Nov 2023 12:27:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1701084432; bh=AuKYoWFJ7sVxjyuT0y2LtlrUIBWzhTWO8cEmpOiB9qI=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=vKod8A2MZvWRjzcKLr4aQcvIZFTcSAMqSOr1Ta/IYYYDxHOvbvkhJf4uj5izp0tjA GWpGzFGXRml8+336jS+dMWuqA5JS1QKI2LLt0fpTKaoZeWURnUqAOj6lNGSMhlnCmr /93pSFnwVdMBuG6DKh7V55dPTuFwtYtIKACKu0hc= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20231127025706.GT87953@dragon> References: <20231101104614.2209986-1-kieran.bingham@ideasonboard.com> <20231127025706.GT87953@dragon> Subject: Re: [PATCH v2] arm64: dts: freescale: debix-som-a-bmb-08: Add CSI Power Regulators From: Kieran Bingham Cc: devicetree@vger.kernel.org, Marco Felsch , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , moderated list: ARM/FREESCALE IMX / MXC ARM ARCHITECTURE , open list , ; Illegal-Object: Syntax error in Cc: address found on vger.kernel.org: Cc: ; ^-missing semicolon to end mail group, extraneous tokens in mailbox, missing end of mailbox To: Shawn Guo Date: Mon, 27 Nov 2023 11:27:43 +0000 Message-ID: <170108446363.451646.11141020197161463231@ping.linuxembedded.co.uk> User-Agent: alot/0.10 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 27 Nov 2023 03:28:04 -0800 (PST) Quoting Shawn Guo (2023-11-27 02:57:06) > On Wed, Nov 01, 2023 at 10:46:11AM +0000, Kieran Bingham wrote: > > Provide the 1.8 and 3.3 volt regulators that are utilised on the Debix > > SOM BMB-08 base board. > >=20 > > Facilitate this by also supplying the pin control used to enable the > > regulators on the second MIPI CSI port. > >=20 > > Reviewed-by: Marco Felsch > > Signed-off-by: Kieran Bingham > >=20 > > --- > > v2: > > - Remove _SW post fixes from regulators. > >=20 > > .../freescale/imx8mp-debix-som-a-bmb-08.dts | 56 +++++++++++++++++++ > > 1 file changed, 56 insertions(+) > >=20 > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dt= s b/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts > > index 0b0c95432bdc..386177c66c6d 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts > > @@ -63,6 +63,50 @@ regulator-som-vdd3v3 { > > regulator-always-on; > > }; > > =20 > > + reg_csi1_1v8: regulator-csi1-vdd1v8 { > > + compatible =3D "regulator-fixed"; > > + regulator-min-microvolt =3D <1800000>; > > + regulator-max-microvolt =3D <1800000>; > > + regulator-name =3D "CSI1_VDD1V8"; > > + gpio =3D <&expander0 13 GPIO_ACTIVE_HIGH>; > > + vin-supply =3D <®_baseboard_vdd3v3>; > > + enable-active-high; >=20 > Could you move it one line above, so that it appears right after > GPIO_ACTIVE_HIGH polarity? Yes, Sorry - I'm not sure why this is inconsistent with all the others. v3 heading out next. -- Kieran >=20 > Shawn >=20 > > + }; > > + > > + reg_csi1_3v3: regulator-csi1-vdd3v3 { > > + compatible =3D "regulator-fixed"; > > + regulator-min-microvolt =3D <3300000>; > > + regulator-max-microvolt =3D <3300000>; > > + regulator-name =3D "CSI1_VDD3V3"; > > + gpio =3D <&expander0 14 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + vin-supply =3D <®_vdd5v0>; > > + }; > > + > > + reg_csi2_1v8: regulator-csi2-vdd1v8 { > > + compatible =3D "regulator-fixed"; > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&pinctrl_reg_csi2_1v8>; > > + regulator-min-microvolt =3D <1800000>; > > + regulator-max-microvolt =3D <1800000>; > > + regulator-name =3D "CSI2_VDD1V8"; > > + gpio =3D <&gpio3 21 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + vin-supply =3D <®_baseboard_vdd3v3>; > > + }; > > + > > + reg_csi2_3v3: regulator-csi2-vdd3v3 { > > + compatible =3D "regulator-fixed"; > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&pinctrl_reg_csi2_3v3>; > > + regulator-min-microvolt =3D <3300000>; > > + regulator-max-microvolt =3D <3300000>; > > + regulator-name =3D "CSI2_VDD3V3"; > > + gpio =3D <&gpio4 25 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + vin-supply =3D <®_vdd5v0>; > > + }; > > + > > regulator-vbus-usb20 { > > compatible =3D "regulator-fixed"; > > regulator-min-microvolt =3D <5000000>; > > @@ -413,6 +457,18 @@ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0= x41 > > >; > > }; > > =20 > > + pinctrl_reg_csi2_1v8: regcsi21v8grp { > > + fsl,pins =3D < > > + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0= x19 > > + >; > > + }; > > + > > + pinctrl_reg_csi2_3v3: regcsi23v3grp { > > + fsl,pins =3D < > > + MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0= x19 > > + >; > > + }; > > + > > pinctrl_uart2: uart2grp { > > fsl,pins =3D < > > MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0= x14f > > --=20 > > 2.34.1 > >