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Mon, 27 Nov 2023 11:49:15 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3ARBnEat016991 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Nov 2023 11:49:14 GMT Received: from [10.217.219.216] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 27 Nov 2023 03:49:08 -0800 Message-ID: <1341f3d2-f20f-af2b-fd6e-bfe63a32630f@quicinc.com> Date: Mon, 27 Nov 2023 17:19:05 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.1 Subject: Re: [PATCH v2 1/3] dt-bindings: phy: qcom,qmp: Add PCIe qcom,refclk-always-on property Content-Language: en-US To: Conor Dooley , Dmitry Baryshkov CC: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , , , , , , , References: <20231107-refclk_always_on-v2-0-de23962fc4b3@quicinc.com> <20231107-refclk_always_on-v2-1-de23962fc4b3@quicinc.com> <20231108-surgical-yelling-7314b68c0289@spud> From: Krishna Chaitanya Chundru In-Reply-To: <20231108-surgical-yelling-7314b68c0289@spud> Content-Type: text/plain; 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Mon, 27 Nov 2023 03:49:37 -0800 (PST) On 11/8/2023 9:22 PM, Conor Dooley wrote: > On Tue, Nov 07, 2023 at 03:01:47PM +0200, Dmitry Baryshkov wrote: >> On Tue, 7 Nov 2023 at 14:26, Krishna chaitanya chundru >> wrote: >>> Document qcom,refclk-always-on property which is needed in some platforms >>> to supply refclk even in PCIe low power states. >>> >>> Signed-off-by: Krishna chaitanya chundru >>> --- >>> .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >>> index 2c3d6553a7ba..263291447a5b 100644 >>> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >>> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >>> @@ -93,6 +93,13 @@ properties: >>> "#phy-cells": >>> const: 0 >>> >>> + qcom,refclk-always-on: >>> + type: boolean >>> + description: If there is some issues in platform with clkreq signal >> nit: there are some >> >> However this still doesn't describe what kind of issues with clkreq >> you observe. I mean, clkreq is just a GPIO pin. >> >>> + propagation to the host and due to that host will not send refclk, which >>> + results in linkdown in L1.2 or L1.1 exit initiated by EP. This property >>> + if set keeps refclk always on even in Low power states (optional). > Dimitry's issues with the property aside, putting "(optional)" in the > description is meaningless - qcom,refclk-always-on isn't listed in the > required properties section, so therefore has to be optional. > > Cheers, > Conor. I removed the optional flag and updated the description. - Krishna chaitanya. >>> + >>> required: >>> - compatible >>> - reg >>> >>> -- >>> 2.42.0 >>> >>> >> >> -- >> With best wishes >> Dmitry