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([2605:a601:adae:4500:2dd6:4d2f:2741:8d95]) by smtp.gmail.com with ESMTPSA id l15-20020a056e020e4f00b0035b0b56e0e1sm1987657ilk.53.2023.11.27.06.32.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Nov 2023 06:32:40 -0800 (PST) Message-ID: <2de6d526-918b-44f6-b26a-a0f30c42c5b3@sifive.com> Date: Mon, 27 Nov 2023 08:32:39 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 2/5] RISC-V: Expose Ssdtso via hwprobe API Content-Language: en-US To: Christoph Muellner References: <20231124072142.2786653-1-christoph.muellner@vrull.eu> <20231124072142.2786653-3-christoph.muellner@vrull.eu> Cc: linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Albert Ou , Andrew Morton , Shuah Khan , Jonathan Corbet , Anup Patel , Philipp Tomsich , Andrew Jones , Guo Ren , Daniel Henrique Barboza , Conor Dooley , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Alan Stern , Andrea Parri , Will Deacon , Daniel Lustig , Peter Zijlstra From: Samuel Holland In-Reply-To: <20231124072142.2786653-3-christoph.muellner@vrull.eu> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Mon, 27 Nov 2023 06:34:47 -0800 (PST) Hi Christoph, On 2023-11-24 1:21 AM, Christoph Muellner wrote: > From: Christoph Müllner > > This patch adds Ssdtso to the list of extensions which > are announced to user-space using te hwprobe API. > > Signed-off-by: Christoph Müllner > --- > Documentation/arch/riscv/hwprobe.rst | 3 +++ > arch/riscv/include/uapi/asm/hwprobe.h | 1 + > arch/riscv/kernel/sys_riscv.c | 1 + > 3 files changed, 5 insertions(+) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index 7b2384de471f..8de3349e0ca2 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -80,6 +80,9 @@ The following keys are defined: > * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as > ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. > > + * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Ssdtso extension is supported, as Should be RISCV_HWPROBE_EXT_SSDTSO. Regards, Samuel > + in version v1.0-draft2 of the corresponding extension. > + > * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance > information about the selected set of processors. > > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index b659ffcfcdb4..ed450c64e6b2 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -30,6 +30,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > #define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > +#define RISCV_HWPROBE_EXT_SSDTSO (1 << 7) > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) > diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c > index c712037dbe10..c654f43b9699 100644 > --- a/arch/riscv/kernel/sys_riscv.c > +++ b/arch/riscv/kernel/sys_riscv.c > @@ -162,6 +162,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, > EXT_KEY(ZBB); > EXT_KEY(ZBS); > EXT_KEY(ZICBOZ); > + EXT_KEY(SSDTSO); > #undef EXT_KEY > } >