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References: <20231127095403.272424-1-vadim.shakirov@syntacore.com>
In-Reply-To: <20231127095403.272424-1-vadim.shakirov@syntacore.com>
From:   Atish Patra <atishp@atishpatra.org>
Date:   Mon, 27 Nov 2023 23:57:04 -0800
Message-ID: <CAOnJCUKjruQRbZXCHx+fNS34dvfNXDozWEm=Yr_KnLKOYc3OgQ@mail.gmail.com>
Subject: Re: [PATCH] drivers: perf: ctr_get_width function for legacy is not defined
To:     Vadim Shakirov <vadim.shakirov@syntacore.com>
Cc:     Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Alexandre Ghiti <alexghiti@rivosinc.com>,
        Andrew Jones <ajones@ventanamicro.com>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
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On Mon, Nov 27, 2023 at 1:54=E2=80=AFAM Vadim Shakirov
<vadim.shakirov@syntacore.com> wrote:
>
> With parameters CONFIG_RISCV_PMU_LEGACY=3Dy and CONFIG_RISCV_PMU_SBI=3Dn
> linux kernel crashes when you try perf record:
>
> $ perf record ls
> [   46.749286] Unable to handle kernel NULL pointer dereference at virtua=
l address 0000000000000000
> [   46.750199] Oops [#1]
> [   46.750342] Modules linked in:
> [   46.750608] CPU: 0 PID: 107 Comm: perf-exec Not tainted 6.6.0 #2
> [   46.750906] Hardware name: riscv-virtio,qemu (DT)
> [   46.751184] epc : 0x0
> [   46.751430]  ra : arch_perf_update_userpage+0x54/0x13e
> [   46.751680] epc : 0000000000000000 ra : ffffffff8072ee52 sp : ff200000=
0022b8f0
> [   46.751958]  gp : ffffffff81505988 tp : ff6000000290d400 t0 : ff200000=
0022b9c0
> [   46.752229]  t1 : 0000000000000001 t2 : 0000000000000003 s0 : ff200000=
0022b930
> [   46.752451]  s1 : ff600000028fb000 a0 : 0000000000000000 a1 : ff600000=
028fb000
> [   46.752673]  a2 : 0000000ae2751268 a3 : 00000000004fb708 a4 : 00000000=
00000004
> [   46.752895]  a5 : 0000000000000000 a6 : 000000000017ffe3 a7 : 00000000=
000000d2
> [   46.753117]  s2 : ff600000028fb000 s3 : 0000000ae2751268 s4 : 00000000=
00000000
> [   46.753338]  s5 : ffffffff8153e290 s6 : ff600000863b9000 s7 : ff600000=
02961078
> [   46.753562]  s8 : ff60000002961048 s9 : ff60000002961058 s10: 00000000=
00000001
> [   46.753783]  s11: 0000000000000018 t3 : ffffffffffffffff t4 : ffffffff=
ffffffff
> [   46.754005]  t5 : ff6000000292270c t6 : ff2000000022bb30
> [   46.754179] status: 0000000200000100 badaddr: 0000000000000000 cause: =
000000000000000c
> [   46.754653] Code: Unable to access instruction at 0xffffffffffffffec.
> [   46.754939] ---[ end trace 0000000000000000 ]---
> [   46.755131] note: perf-exec[107] exited with irqs disabled
> [   46.755546] note: perf-exec[107] exited with preempt_count 4
>
> This happens because in the legacy case the ctr_get_width function was no=
t
> defined, but it is used in arch_perf_update_userpage.
>
> Fixes: cc4c07c89aad ("drivers: perf: Implement perf event mmap support in=
 the SBI backend")
> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>

Legacy PMU shouldn't enable perf sampling in the first place. We need
to set the capabilities accordingly.

@@ -111,14 +116,17 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
        pmu->ctr_stop =3D NULL;
        pmu->event_map =3D pmu_legacy_event_map;
        pmu->ctr_get_idx =3D pmu_legacy_ctr_get_idx;
        pmu->ctr_get_width =3D NULL;
        pmu->ctr_clear_idx =3D NULL;
        pmu->ctr_read =3D pmu_legacy_read_ctr;
        pmu->event_mapped =3D pmu_legacy_event_mapped;
        pmu->event_unmapped =3D pmu_legacy_event_unmapped;
        pmu->csr_index =3D pmu_legacy_csr_index;
 +     pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT;
+      pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_EXCLUDE;
        perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
 }


> ---
>  drivers/perf/riscv_pmu_legacy.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_leg=
acy.c
> index 79fdd667922e..a179ed6ac980 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -37,6 +37,12 @@ static int pmu_legacy_event_map(struct perf_event *eve=
nt, u64 *config)
>         return pmu_legacy_ctr_get_idx(event);
>  }
>
> +/* cycle & instret are always 64 bit, one bit less according to SBI spec=
 */
> +static int pmu_legacy_ctr_get_width(int idx)
> +{
> +       return 63;
> +}
> +

Having said that, there is no harm in defining the width function for
legacy PMU.
The common riscv_pmu.c fixes the counter width to 63 if ctr_get_width
is not defined. We may be to get rid of that
as both drivers will have a valid function pointer.

>  static u64 pmu_legacy_read_ctr(struct perf_event *event)
>  {
>         struct hw_perf_event *hwc =3D &event->hw;
> @@ -111,7 +117,7 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>         pmu->ctr_stop =3D NULL;
>         pmu->event_map =3D pmu_legacy_event_map;
>         pmu->ctr_get_idx =3D pmu_legacy_ctr_get_idx;
> -       pmu->ctr_get_width =3D NULL;
> +       pmu->ctr_get_width =3D pmu_legacy_ctr_get_width;
>         pmu->ctr_clear_idx =3D NULL;
>         pmu->ctr_read =3D pmu_legacy_read_ctr;
>         pmu->event_mapped =3D pmu_legacy_event_mapped;
> --
> 2.34.1
>


--=20
Regards,
Atish