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Message-ID: <f40f9c163f094a60443516f1744c8d09b4dc10ca.camel@gmail.com>
Subject: Re: [PATCH net-next] net: phy: adin: allow control of Fast Link Down
From:   Nuno =?ISO-8859-1?Q?S=E1?= <noname.nuno@gmail.com>
To:     Vincent Whitchurch <vincent.whitchurch@axis.com>,
        Michael Hennerich <michael.hennerich@analog.com>,
        Andrew Lunn <andrew@lunn.ch>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>
Cc:     netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        kernel@axis.com
Date:   Tue, 28 Nov 2023 10:09:24 +0100
In-Reply-To: <20231127-adin-fld-v1-1-797f6423fd48@axis.com>
References: <20231127-adin-fld-v1-1-797f6423fd48@axis.com>
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On Mon, 2023-11-27 at 16:31 +0100, Vincent Whitchurch wrote:
> Add support to allow Fast Link Down (aka "Enhanced link detection") to
> be controlled via the ETHTOOL_PHY_FAST_LINK_DOWN tunable.=C2=A0 These PHY=
s
> have this feature enabled by default.
>=20
> Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
> ---

LGTM,

Acked-by: Nuno Sa <nuno.sa@analog.com>

Thanks!
- Nuno S=C3=A1

> =C2=A0drivers/net/phy/adin.c | 53
> ++++++++++++++++++++++++++++++++++++++++++++++++++
> =C2=A01 file changed, 53 insertions(+)
>=20
> diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> index 134637584a83..2e1a46e121d9 100644
> --- a/drivers/net/phy/adin.c
> +++ b/drivers/net/phy/adin.c
> @@ -68,6 +68,24 @@
> =C2=A0#define ADIN1300_EEE_CAP_REG			0x8000
> =C2=A0#define ADIN1300_EEE_ADV_REG			0x8001
> =C2=A0#define ADIN1300_EEE_LPABLE_REG			0x8002
> +
> +#define ADIN1300_FLD_EN_REG			0x8E27
> +#define=C2=A0=C2=A0 ADIN1300_FLD_PCS_ERR_100_EN		BIT(7)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_PCS_ERR_1000_EN		BIT(6)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_OUT_STUCK_100_EN	BIT(5)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_OUT_STUCK_1000_EN	BIT(4)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_IN_ZDET_100_EN	BIT(3)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_IN_ZDET_1000_EN	BIT(2)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_IN_INVLD_100_EN	BIT(1)
> +#define=C2=A0=C2=A0 ADIN1300_FLD_SLCR_IN_INVLD_1000_EN	BIT(0)
> +/* These bits are the ones which are enabled by default. */
> +#define ADIN1300_FLD_EN_ON	\
> +	(ADIN1300_FLD_SLCR_OUT_STUCK_100_EN | \
> +	 ADIN1300_FLD_SLCR_OUT_STUCK_1000_EN | \
> +	 ADIN1300_FLD_SLCR_IN_ZDET_100_EN | \
> +	 ADIN1300_FLD_SLCR_IN_ZDET_1000_EN | \
> +	 ADIN1300_FLD_SLCR_IN_INVLD_1000_EN)
> +
> =C2=A0#define ADIN1300_CLOCK_STOP_REG			0x9400
> =C2=A0#define ADIN1300_LPI_WAKE_ERR_CNT_REG		0xa000
> =C2=A0
> @@ -416,6 +434,37 @@ static int adin_set_edpd(struct phy_device *phydev, =
u16
> tx_interval)
> =C2=A0			=C2=A0 val);
> =C2=A0}
> =C2=A0
> +static int adin_get_fast_down(struct phy_device *phydev, u8 *msecs)
> +{
> +	int reg;
> +
> +	reg =3D phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_FLD_EN_REG);
> +	if (reg < 0)
> +		return reg;
> +
> +	if (reg & ADIN1300_FLD_EN_ON)
> +		*msecs =3D ETHTOOL_PHY_FAST_LINK_DOWN_ON;
> +	else
> +		*msecs =3D ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
> +
> +	return 0;
> +}
> +
> +static int adin_set_fast_down(struct phy_device *phydev, const u8 *msecs=
)
> +{
> +	if (*msecs =3D=3D ETHTOOL_PHY_FAST_LINK_DOWN_ON)
> +		return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
> +					ADIN1300_FLD_EN_REG,
> +					ADIN1300_FLD_EN_ON);
> +
> +	if (*msecs =3D=3D ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
> +		return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
> +					=C2=A0 ADIN1300_FLD_EN_REG,
> +					=C2=A0 ADIN1300_FLD_EN_ON);
> +
> +	return -EINVAL;
> +}
> +
> =C2=A0static int adin_get_tunable(struct phy_device *phydev,
> =C2=A0			=C2=A0=C2=A0=C2=A0 struct ethtool_tunable *tuna, void *data)
> =C2=A0{
> @@ -424,6 +473,8 @@ static int adin_get_tunable(struct phy_device *phydev=
,
> =C2=A0		return adin_get_downshift(phydev, data);
> =C2=A0	case ETHTOOL_PHY_EDPD:
> =C2=A0		return adin_get_edpd(phydev, data);
> +	case ETHTOOL_PHY_FAST_LINK_DOWN:
> +		return adin_get_fast_down(phydev, data);
> =C2=A0	default:
> =C2=A0		return -EOPNOTSUPP;
> =C2=A0	}
> @@ -437,6 +488,8 @@ static int adin_set_tunable(struct phy_device *phydev=
,
> =C2=A0		return adin_set_downshift(phydev, *(const u8 *)data);
> =C2=A0	case ETHTOOL_PHY_EDPD:
> =C2=A0		return adin_set_edpd(phydev, *(const u16 *)data);
> +	case ETHTOOL_PHY_FAST_LINK_DOWN:
> +		return adin_set_fast_down(phydev, data);
> =C2=A0	default:
> =C2=A0		return -EOPNOTSUPP;
> =C2=A0	}
>=20
> ---
> base-commit: e1df5202e879bce09845ac62bae30206e1edfb80
> change-id: 20231127-adin-fld-c072c3b79a5a
>=20
> Best regards,