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Tue, 28 Nov 2023 10:04:16 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3ASA3t15024268 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 10:03:55 GMT Received: from [10.253.11.37] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 28 Nov 2023 02:03:51 -0800 Message-ID: <4038b408-838d-4804-8866-cc8471749daa@quicinc.com> Date: Tue, 28 Nov 2023 18:03:49 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 09/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 Content-Language: en-US To: , , , , , , , CC: , , Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , "open list:GENERIC PHY FRAMEWORK" , open list References: <1700729190-17268-1-git-send-email-quic_cang@quicinc.com> <1700729190-17268-10-git-send-email-quic_cang@quicinc.com> <0d8fe915-4d53-414b-b145-231fe913474d@linaro.org> From: Can Guo In-Reply-To: <0d8fe915-4d53-414b-b145-231fe913474d@linaro.org> Content-Type: text/plain; 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Tue, 28 Nov 2023 02:04:38 -0800 (PST) Hi Neil, On 11/28/2023 5:59 PM, neil.armstrong@linaro.org wrote: > Hi, > > On 23/11/2023 09:46, Can Guo wrote: >> On SM8550, two sets of UFS PHY settings are provided, one set is to >> support >> HS-G5, another set is to support HS-G4 and lower gears. The two sets >> of PHY >> settings are programming different values to different registers, mixing >> the two sets and/or overwriting one set with another set is definitely >> not >> blessed by UFS PHY designers. >> >> To add HS-G5 support for SM8550, split the two sets of PHY settings into >> their dedicated overlay tables, only the common parts of the two sets of >> PHY settings are left in the .tbls. >> >> Consider we are going to add even higher gear support in future, to avoid >> adding more tables with different names, rename the .tbls_hs_g4 and >> make it >> an array, a size of 2 is enough as of now. >> >> In this case, .tbls alone is not a complete set of PHY settings, so >> either >> tbls_hs_overlay[0] or tbls_hs_overlay[1] must be applied on top of the >> .tbls to become a complete set of PHY settings. >> >> Signed-off-by: Can Guo > > Since Vinod has already merged SM8650 UFS PHY support, I'm afraid this > serie will break UFS if the SM8650 UFS tables aren't updated aswell. > > Could you confirm if this will be the case ? Because this change modifies data struct, it would be caught during compiliation stage even if this change applies cleanly, hence it won't break UFS. Thanks, Can Guo. > > Thanks, > Neil > >