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Tue, 28 Nov 2023 10:33:03 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3ASAX2aM017390 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 10:33:02 GMT Received: from [10.216.9.39] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 28 Nov 2023 02:32:56 -0800 Message-ID: <18965bb9-7afa-4892-8b71-981ba29d2cd4@quicinc.com> Date: Tue, 28 Nov 2023 16:02:53 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] dt-bindings: usb: dwc3: Clean up hs_phy_irq in bindings Content-Language: en-US To: Johan Hovold CC: Andy Gross , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , , , , , , , References: <20231122191335.3058-1-quic_kriskura@quicinc.com> <1192d91f-11bf-44af-953a-14e08e2b6ca8@quicinc.com> <004ddc69-1566-4de4-b260-0fca96a9395f@quicinc.com> From: Krishna Kurapati PSSNV In-Reply-To: Content-Type: text/plain; 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Tue, 28 Nov 2023 02:37:49 -0800 (PST) >>>>> Now if the HS interrupt is truly unusable, I guess we can consider >>>>> dropping it throughout and the above becomes just three permutations >>>>> instead, which can even be expressed along the lines of: >>>> >>>> Infact, I wanted to do this but since you mentioned before that if HW >>>> has it, we must describe it, I kept it in. But since this functionality >>>> is confirmed to be mutually exclusive of qusb2/{dp/dm}, I am aligned to >>>> skip it in bindings and drop it in DT. >>> >>> As I mentioned elsewhere, it depends on whether it can be used at all. >>> Not simply whether there is some other mechanism that can be used in its >>> stead. Such a decision should be left up to the implementation. >>> >>> That's why I said "truly unusable" above. It's still not clear to me >>> whether that is the case or not. >> >> I looked at the code of 4.4, 4.14/ 4.19/ 5.4/ 5.10/ 5.15/ 6.1 and none >> of them implement the hs_phy_irq. > > But again, that is completely irrelevant. As I've said numerous times > now, this is about what the hardware is capable of, not which > functionality a particular OS chooses to use. > >> My opinion would be to keep the power_event irq as mandatory and not to >> include the hs_phy_irq. > > Ok, but you still need to explain why dropping hs_phy_irq is correct. > > Until there's a clear answer to that, it seems we need to include it. Sure, I agree with you. It should describe what hardware is capable of, not what we choose to add in driver code. In that sense we can add the hs_phy_irq to all targets. In my next revision, I can do the following: - anyOf: - items: - const: qusb2_phy - items: - const: dp_hs_phy_irq - const: dm_hs_phy_irq - const: hs_phy_irq - const: pwr_event - const: ss_phy_irq (optional) A modified version of your suggestion should help cover all cases and describe all DT's perfectly. Let me know your thoughts on this. Regards, Krishna,