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[23.128.96.32]) by mx.google.com with ESMTPS id fb23-20020a056a002d9700b006935df3019esi12097763pfb.235.2023.11.28.03.12.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Nov 2023 03:12:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=T4GeaJRc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 891EF8099CC5; Tue, 28 Nov 2023 03:12:29 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234686AbjK1LMM (ORCPT + 99 others); Tue, 28 Nov 2023 06:12:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234607AbjK1LMH (ORCPT ); Tue, 28 Nov 2023 06:12:07 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23BDAD6 for ; Tue, 28 Nov 2023 03:12:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701169934; x=1732705934; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=4sQGMsoKH4XsBlVx0DVZlFut2gRlSwx7PwBvuuYhn4w=; b=T4GeaJRcTTUh1WW5b/5jF4CdjVS3X9agR4DO1qaSweyFEpChyjEWUiYs IGrYtkH1p7mAUAMlH5nn5LVmvhL55v8ChIaTuKQD6NohAwEuNcJy+TTxm PKReP7qzlOq9wM8e6kPA7/9P3jwihuhobGbAfXEIM7EtKYOKFaSnZpqWR niRBTUzrZ0Z5PVHN+Y4vR6n3aomu/3qzIlOntzmOpOgOR94tUsoHDpEmP nNt3AJEEtRCcWncLCBFDrjxouJJGo0IMXvMDyvHi6RpXatViKsuKyXIMg Hh0KUcoz3PNxysbkm1gUA+LGg8ZA0vDeHt8WLJD3lkv/2sjcqGfe1Ay18 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="14460251" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="14460251" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:12:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="859398036" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="859398036" Received: from ahajda-mobl.ger.corp.intel.com (HELO [10.213.14.21]) ([10.213.14.21]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:12:10 -0800 Message-ID: <51baffb9-2249-4080-a245-eb1e03c02b9b@intel.com> Date: Tue, 28 Nov 2023 12:12:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix phys_base to be relative not absolute Content-Language: en-US To: Paz Zcharya Cc: Subrata Banik , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, Marcin Wojtas , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sean Paul , matthew.auld@intel.com, Daniel Vetter , Rodrigo Vivi , Drew Davenport , David Airlie , Nirmoy Das References: <20231105172718.18673-1-pazz@chromium.org> <8dd6f4da-dcc9-4ea3-8395-bf048b0dbc93@intel.com> <6f08cfee-a60b-4f6e-b69a-20517c563259@intel.com> From: Andrzej Hajda Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 28 Nov 2023 03:12:29 -0800 (PST) On 28.11.2023 04:47, Paz Zcharya wrote: > > On Mon, Nov 27, 2023 at 8:20 PM Paz Zcharya wrote: >> >> On 21.11.2023 13:06, Andrzej Hajda wrote: >>> On 18.11.2023 00:01, Paz Zcharya wrote: >>>> On Tue, Nov 14, 2023 at 10:13:59PM -0500, Rodrigo Vivi wrote: >>>>> On Sun, Nov 05, 2023 at 05:27:03PM +0000, Paz Zcharya wrote: >>>> >>>> Hi Rodrigo, thanks for the great comments. >>>> >>>> Apologies for using a wrong/confusing terminology. I think 'phys_base' >>>> is supposed to be the offset in the GEM BO, where base (or >>>> "Surface Base Address") is supposed to be the GTT offset. >>> >>> Since base is taken from PLANE_SURF register it should be resolvable via >>> GGTT to physical address pointing to actual framebuffer. >>> I couldn't find anything in the specs. >> >> It was quite cryptic. I meant I have not found anything about assumption >> from commit history that for iGPU there should be 1:1 mapping, this is why >> there was an assignment "phys_base = base". Possibly the assumption is not >> valid anymore for MTL(?). >> Without the assumption we need to check GGTT to determine phys address. >> >>> The simplest approach would be then do the same as in case of DGFX: >>> gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; >>> gen8_pte_t pte; >>> >>> gte += base / I915_GTT_PAGE_SIZE; >>> >>> pte = ioread64(gte); >>> phys_base = pte & I915_GTT_PAGE_MASK; >>> >>> Regards >>> Andrzej > > Hey Andrzej, > > On a second thought, what do you think about something like > > + gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; > + gen8_pte_t pte; > + gte += base / I915_GTT_PAGE_SIZE; > + pte = ioread64(gte); > + pte = pte & I915_GTT_PAGE_MASK; > + phys_base = pte - i915->mm.stolen_region->region.start; > > The only difference is the last line. Bingo :) It seems to be generic algorithm to get phys_base for all platforms: - on older platforms stolen_region points to system memory which starts at 0, - on DG2 it uses lmem region which starts at 0 as well, - on MTL stolen_region points to stolen-local which starts at 0x800000. So this whole "if (IS_DGFX(i915)) {...} else {...}" could be replaced with sth generic. 1. Find pte. 2. if(IS_DGFX(i915) && pte & GEN12_GGTT_PTE_LM) mem = i915->mm.regions[INTEL_REGION_LMEM_0] else mem = i915->mm.stolen_region 3. phys_base = (pte & I915_GTT_PAGE_MASK) - mem->region.start; Regards Andrzej > > Based on what I wrote before, I think `phys_base` is named incorrectly and > that it does not reflect the physical address, but the start offset of > i915->mm.stolen_region. So if we offset the start value of the stolen > region, this code looks correct to me (and it also works on my > MeteorLake device). > > What do you think? > > > Many thanks, > Paz >