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From:   <Shravan.Chippa@microchip.com>
To:     <vkoul@kernel.org>
CC:     <green.wan@sifive.com>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <palmer@dabbelt.com>,
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        <Nagasuresh.Relli@microchip.com>, <Praveen.Kumar@microchip.com>,
        <emil.renner.berthing@canonical.com>
Subject: RE: [PATCH v4 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
Thread-Topic: [PATCH v4 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
Thread-Index: AQHaC7rsFK61Gcrk5UGSzfsdrL5RtLCJh0cAgAY9ATA=
Date:   Tue, 28 Nov 2023 11:29:12 +0000
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References: <20231031052753.3430169-1-shravan.chippa@microchip.com>
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Hi Vinod,

> -----Original Message-----
> From: Vinod Koul <vkoul@kernel.org>
> Sent: Friday, November 24, 2023 5:42 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli=
 -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Emil Renner Berthing
> <emil.renner.berthing@canonical.com>
> Subject: Re: [PATCH v4 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>=20
> [Some people who received this message don't often get email from
> vkoul@kernel.org. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>=20
> EXTERNAL EMAIL: Do not click links or open attachments unless you know th=
e
> content is safe
>=20
> On 31-10-23, 10:57, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers, Add a
> > PolarFire SoC specific compatible and code to support for out-of-order
> > dma transfers
>=20
> By default dma xtions are not supposed to be out of order, so why does it
> make sense specifying that here?

All the DMA transfers are mostly in-order; however, sf-pdma IP has programa=
ble configuration:
we can select the transfer type either in-order or out-of-order.
=20
Sf-pdam IP will only support mem-to-mem transfers.=20
=20
We got better throughput in the PolarFire SoC platform if we use out-of-ord=
er DMA transfers type, instead of in-order configuration in the sf-pdma IP.
=20
test results for in-order:
- moved 16 MB from 0x89000000 using pdmacpy to 0x88000000 (chan: 0) in 0.06=
8962 secs (232.012 MB per sec)
=20
test results for out-of-order:
- moved 16 MB from 0x89000000 using pdmacpy to 0x88000000 (chan: 0) in 0.03=
7020 secs (432.199 MB per sec)

Thanks,
Shravan

>=20
> >
> > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h |  8 +++++++-
> >  2 files changed, 31 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index 4c456bdef882..82ab12c40743
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -25,6 +25,8 @@
> >
> >  #include "sf-pdma.h"
> >
> > +#define PDMA_QUIRK_NO_STRICT_ORDERING   BIT(0)
> > +
> >  #ifndef readq
> >  static inline unsigned long long readq(void __iomem *addr)  { @@
> > -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct
> > sf_pdma_chan *chan)  static void sf_pdma_fill_desc(struct sf_pdma_desc
> *desc,
> >                             u64 dst, u64 src, u64 size)  {
> > -     desc->xfer_type =3D PDMA_FULL_SPEED;
> > +     desc->xfer_type =3D  desc->chan->pdma->transfer_type;
> >       desc->xfer_size =3D size;
> >       desc->dst_addr =3D dst;
> >       desc->src_addr =3D src;
> > @@ -520,6 +522,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> > +     const struct sf_pdma_driver_platdata *ddata;
> >       struct sf_pdma *pdma;
> >       int ret, n_chans;
> >       const enum dma_slave_buswidth widths =3D @@ -545,6 +548,14 @@
> > static int sf_pdma_probe(struct platform_device *pdev)
> >
> >       pdma->n_chans =3D n_chans;
> >
> > +     pdma->transfer_type =3D PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> > +
> > +     ddata  =3D device_get_match_data(&pdev->dev);
> > +     if (ddata) {
> > +             if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> > +                     pdma->transfer_type &=3D ~PDMA_STRICT_ORDERING;
> > +     }
> > +
> >       pdma->membase =3D devm_platform_ioremap_resource(pdev, 0);
> >       if (IS_ERR(pdma->membase))
> >               return PTR_ERR(pdma->membase); @@ -632,9 +643,19 @@
> > static int sf_pdma_remove(struct platform_device *pdev)
> >       return 0;
> >  }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma =3D {
> > +     .quirks =3D PDMA_QUIRK_NO_STRICT_ORDERING, };
> > +
> >  static const struct of_device_id sf_pdma_dt_ids[] =3D {
> > -     { .compatible =3D "sifive,fu540-c000-pdma" },
> > -     { .compatible =3D "sifive,pdma0" },
> > +     {
> > +             .compatible =3D "sifive,fu540-c000-pdma",
> > +     }, {
> > +             .compatible =3D "sifive,pdma0",
> > +     }, {
> > +             .compatible =3D "microchip,mpfs-pdma",
> > +             .data       =3D &mpfs_pdma,
> > +     },
> >       {},
> >  };
> >  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids); diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..267e79a5e0a5 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -48,7 +48,8 @@
> >  #define PDMA_ERR_STATUS_MASK                         GENMASK(31, 31)
> >
> >  /* Transfer Type */
> > -#define PDMA_FULL_SPEED                                      0xFF00000=
8
> > +#define PDMA_FULL_SPEED                                      0xFF00000=
0
> > +#define PDMA_STRICT_ORDERING                         BIT(3)
> >
> >  /* Error Recovery */
> >  #define MAX_RETRY                                    1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> >       struct dma_device       dma_dev;
> >       void __iomem            *membase;
> >       void __iomem            *mappedbase;
> > +     u32                     transfer_type;
> >       u32                     n_chans;
> >       struct sf_pdma_chan     chans[];
> >  };
> >
> > +struct sf_pdma_driver_platdata {
> > +     u32 quirks;
> > +};
> > +
> >  #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
>=20
> --
> ~Vinod