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Tue, 28 Nov 2023 16:59:42 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-1234-gac66594aae-fm-20231122.001-gac66594a MIME-Version: 1.0 Message-Id: <00c225bf-ed99-4721-9d6a-1e58cdffc79f@app.fastmail.com> In-Reply-To: References: <8ca730b9-fa8c-46ea-bdc5-158da0f29c3a@app.fastmail.com> <245d3985-9085-4be0-8c74-d95d06334584@app.fastmail.com> <3iksuovvsln3cw3xpmjd7f7xixfvwaneu4ok56fnookvyolpco@wrxxew3thgnq> Date: Tue, 28 Nov 2023 22:59:10 +0100 From: "Arnd Bergmann" To: "Serge Semin" Cc: "Jiaxun Yang" , "Thomas Bogendoerfer" , "Andrew Morton" , "Mike Rapoport" , "Matthew Wilcox" , "Tiezhu Yang" , "Huacai Chen" , "Yinglu Yang" , "Alexey Malahov" , "Aleksandar Rikalo" , "Aleksandar Rikalo" , "Dragan Mladjenovic" , "Chao-ying Fu" , "Marc Zyngier" , "linux-mips@vger.kernel.org" , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/7] mips: dmi: Fix early remap on MIPS32 Content-Type: text/plain X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 28 Nov 2023 13:59:56 -0800 (PST) On Tue, Nov 28, 2023, at 14:52, Serge Semin wrote: > On Tue, Nov 28, 2023 at 01:41:51PM +0100, Arnd Bergmann wrote: >> On Mon, Nov 27, 2023, at 17:23, Serge Semin wrote: >> > On Fri, Nov 24, 2023 at 10:03:49PM +0000, Jiaxun Yang wrote: >> but ioremap_cache() is generally underspecified because the >> resulting pointer is neither safe to dereference nor to pass into >> readl()/writel()/memcpy_fromio() on all architectures. > > I don't know about ARM64 (which for instance has it utilized to access > the DMI region), but at least in case of MIPS32 (a fortiori MIPS64 > seeing the ioremap_cache() method actually returns a pointer to the > uncached region) I don't see a reason why it wouldn't be safe in both > cases described by you. All IO and memory regions are accessed by the > generic load and store instructions. The only difference is that the > MMIO-space accessors normally implies additional barriers, which just > slow down the execution, but shouldn't cause any other problem. Could > you clarify why do you think otherwise? On arch/powerpc, CONFIG_PPC_INDIRECT_MMIO makes all ioremap() type functions return a token that can be passed into the readl/writel family but that is not a pointer you can dereference. On s390, the mechanism is different, but similarly __iomem tokens are not pointers at all. >> There was an effort to convert the remaining ioremap_cache() calls >> into memremap() a few years ago, not sure if that's still being worked >> on but it would be the right thing to do. > > I see. Thanks for the pointing out to that. I guess it could be done > for MIPS too (at least on our MIPS32 platform DMI is just a memory > region pre-initialized by the bootloader), but the conversion would > require much efforts. Alas currently I can't afford to get it > implemented in the framework of this patchset. (I saved your note in > my MIPS TODO list though. Let's hope eventually I'll be able to get > back to this topic.) I just noticed that the only architectures that actually provide ioremap_cache() are x86, arm, arm64, mips, loongarch, powerpc, sh and xtensa. The ones that have ACPI support still definitely need it, most of the other ones can probably be fixed without too much trouble. Arnd