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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id ju12-20020a170903428c00b001cf5654fc29sm11145403plb.72.2023.11.28.19.35.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Nov 2023 19:35:32 -0800 (PST) Message-ID: Date: Wed, 29 Nov 2023 11:35:28 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1 Content-Language: en-US To: Krzysztof Kozlowski , linus.walleij@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, j.neuschaefer@gmx.net Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com References: <20231128061118.575847-1-ychuang570808@gmail.com> <20231128061118.575847-4-ychuang570808@gmail.com> <7edda3ca-b98a-4125-979f-3ee7ac718a9a@linaro.org> <7fed5d90-da04-40fb-8677-b807b6f51cc9@linaro.org> <8663d26e-32b8-4f2b-b497-9efa7440f070@gmail.com> <2fab32e6-23a4-41bb-b47b-4f993fc590dc@linaro.org> From: Jacky Huang In-Reply-To: <2fab32e6-23a4-41bb-b47b-4f993fc590dc@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 28 Nov 2023 19:35:46 -0800 (PST) Dear Krzysztof, Thanks for your review. On 2023/11/28 下午 07:06, Krzysztof Kozlowski wrote: > On 28/11/2023 11:45, Jacky Huang wrote: >> Dear Krzysztof, >> >> Thanks for your review. >> >> On 2023/11/28 下午 05:34, Krzysztof Kozlowski wrote: >>> On 28/11/2023 09:37, Jacky Huang wrote: >>>>>> + gpion: gpio@40040340 { >>>>>> + reg = <0x340 0x40>; >>>>>> + interrupts = ; >>>>>> + clocks = <&clk GPN_GATE>; >>>>>> + gpio-controller; >>>>>> + #gpio-cells = <2>; >>>>>> + interrupt-controller; >>>>>> + #interrupt-cells = <2>; >>>>>> + }; >>>>>> + >>>>>> + pcfg_default: pin-default { >>>>>> + slew-rate = <0>; >>>>>> + input-schmitt-disable; >>>>>> + bias-disable; >>>>>> + power-source = <1>; >>>>>> + drive-strength = <17100>; >>>>>> + }; >>>>> It does not look like you tested the DTS against bindings. Please run >>>>> `make dtbs_check W=1` (see >>>>> Documentation/devicetree/bindings/writing-schema.rst or >>>>> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ >>>>> for instructions). >>>>> >>>>> Best regards, >>>>> Krzysztof >>>>> >>>> I forgot to remove 'ma35d1-pinfunc.h' from my local copy. >>>> After remove the '#include ', it >>>> can pass >>>> the `make dtbs_check W=1` check. >>>> I will fix it in the next version. >>> Really? Then your bindings look wrong. Why do you mix MMIO nodes and >>> non-MMIO in one device node? >>> >>> Best regards, >>> Krzysztof >>> >> Yes, it did pass the 'dtbs_check'. I guess the tool does not detect such >> issues. >> Anyway, I will fix it in the next version. > Hm, I see your bindings indeed allow pin-.* and unit addresses, so it is > the binding issue. > > The examples you used as reference - xlnx,zynqmp-pinctrl.yaml and > realtek,rtd1315e-pinctrl.yaml - do not mix these as you do. > > I don't understand why do you need them yet. I don't see any populate of > children. There are no compatibles, either. > > Which part of your driver uses them exactly? > > Best regards, > Krzysztof > I will move the 'pcfg_default: pin-default' from dtsi to dts, like this: &pinctrl {     pcfg_default: pin-default {         slew-rate = <0>;         input-schmitt-disable;         bias-disable;         power-source = <1>;         drive-strength = <17100>;     };     uart-grp {         pinctrl_uart0: uart0-pins {             nuvoton,pins = <4 14 1 &pcfg_default>,                        <4 15 1 &pcfg_default>;         };         pinctrl_uart11: uart11-pins {             nuvoton,pins = <11 0 2 &pcfg_default>,                        <11 1 2 &pcfg_default>,                        <11 2 2 &pcfg_default>,                        <11 3 2 &pcfg_default>;         }; ... I use the 'pin-' and just intent to define a generic pin configuration, such as the above 'pin-default'. Best Regards, Jacky Huang