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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , , , , , , , Andrew Halaney References: <20231124050818.1221-1-quic_snehshah@quicinc.com> <47c9eb95-ff6a-4432-a7ef-1f3ebf6f593f@quicinc.com> <3bf6f666-b58a-460f-88f5-ad8ec08bfbbc@quicinc.com> From: Sneh Shah In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Ihd05gQVYWQ5L930kHs45XYlLcwDm_lx X-Proofpoint-GUID: Ihd05gQVYWQ5L930kHs45XYlLcwDm_lx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-29_09,2023-11-29_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=668 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311290085 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Wed, 29 Nov 2023 03:28:20 -0800 (PST) On 11/27/2023 3:35 PM, Russell King (Oracle) wrote: > On Mon, Nov 27, 2023 at 03:17:20PM +0530, Sneh Shah wrote: >> On 11/27/2023 2:09 PM, Russell King (Oracle) wrote: >>> On Mon, Nov 27, 2023 at 11:25:34AM +0530, Sneh Shah wrote: >>>> On 11/24/2023 2:42 PM, Russell King (Oracle) wrote: >>>>> The next concern I have is that you're only doing this for SPEED_10. >>>>> If it needs to be programmed for SPEED_10 to work, and not any of the >>>>> other speeds, isn't this something that can be done at initialisation >>>>> time? If it has to be done depending on the speed, then don't you need >>>>> to do this for each speed with an appropriate value? >>>> >>>> This field programming is required only for 10M speed in for SGMII mode. other speeds are agnostic to this field. Hence we are programming it always when SGMII link comes up in 10M mode. init driver data for ethqos is common for sgmii and rgmii. As this fix is specific to SGMII we can't add this to init driver data. >>> >>> I wasn't referring to adding it to driver data. I was asking whether it >>> could be done in the initialisation path. >>> >> No, IOMACRO block is configured post phylink up regardless of RGMII or SGMII mode. We are not updating them at driver initialization time itself. > > What reason (in terms of the hardware) requires you to do this every > time you select 10M speed? Does the hardware change the value in the > register? > Yes, the hardware changes the value in register every time the interface is toggled. That is the reason we have ethqos_configure_sgmii function to configure registers whenever there is link activity.