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From:   Thomas Richard <thomas.richard@bootlin.com>
Date:   Wed, 29 Nov 2023 16:31:21 +0100
Subject: [PATCH 5/5] arm64: dts: ti: k3-j7200: add reserved memory regions
 for lpm
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Message-Id: <20231129-j7200-tisci-s2r-v1-5-c1d5964ed574@bootlin.com>
References: <20231129-j7200-tisci-s2r-v1-0-c1d5964ed574@bootlin.com>
In-Reply-To: <20231129-j7200-tisci-s2r-v1-0-c1d5964ed574@bootlin.com>
To:     Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
        Santosh Shilimkar <ssantosh@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Vignesh Raghavendra <vigneshr@ti.com>
Cc:     linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
        gregory.clement@bootlin.com, u-kumar1@ti.com,
        Thomas Richard <thomas.richard@bootlin.com>
Precedence: bulk

Two memory regions are reserved for suspend to ram on j7200.
One is dedicated to TF-A, it uses this region to save its context during
suspend.
The second region is for R5 SPL, which uses it for its stacks and to store
some firmware images.
These regions are reserved from the linux point of view to avoid any
memory corruption.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 5a300d4c8ba0..dc8c9c3e8443 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -79,6 +79,16 @@ rtos_ipc_memory_region: ipc-memories@a4000000 {
 			alignment = <0x1000>;
 			no-map;
 		};
+
+		lpm_r5_spl_ctx_ddr: lpm-memory@a5000000 {
+			reg = <0x00 0xa5000000 0x00 0x1000000>;
+			no-map;
+		};
+
+		lpm_bl31_ctx_ddr: lpm-memory@a6000000 {
+			reg = <0x00 0xa6000000 0x00 0x20000>;
+			no-map;
+		};
 	};
 };
 

-- 
2.39.2